Circuit-Thermal Collaboration Design Method for Outline Design Stage of Mobile Terminal

Author(s):  
Yoshiharu Iwata ◽  
Shintaro Hayashi ◽  
Ryohei Satoh ◽  
Kozo Fujimoto

The device layout design on the circuit board has a common method of performing a thermal design after the circuit design that is the main performance. But, there is no remaining budget of thermal design of the high performance mobile terminal. Then, a large feedback loop of the design from thermal detail design to outline design is occurred on high performance mobile terminal design. For this purpose, we build upon the high-speed module-based thermal analysis. But the design time is very long with using the general optimization method, i.e., GA, SA. Then, we need more high-speed design method. For this purpose, we have proposed the modularized high-speed layered thermal design method based on the boundary conditions between modules. In this report, we constructed the high-speed circuit-thermal collaboration design method at the outline design stage. This design method is collaborated at decision of boundary conditions between both circuit-thermal design methods. Furthermore, this design method, which computes the Pareto solutions set by changing the weight of each design performance index, was constructed. Moreover, we performed a layout design of a board with four devices mounted on top of the circuit board as a case study. The collaboration design solution between thermal layout design (total temperature rise of device =>min.) and circuit layout design (total circuit line length => min.) was computed in about 250sec, and the Pareto solutions set were computed in about 5000sec.

Energies ◽  
2021 ◽  
Vol 14 (14) ◽  
pp. 4144
Author(s):  
Yatai Ji ◽  
Paolo Giangrande ◽  
Vincenzo Madonna ◽  
Weiduo Zhao ◽  
Michael Galea

Transportation electrification has kept pushing low-voltage inverter-fed electrical machines to reach a higher power density while guaranteeing appropriate reliability levels. Methods commonly adopted to boost power density (i.e., higher current density, faster switching frequency for high speed, and higher DC link voltage) will unavoidably increase the stress to the insulation system which leads to a decrease in reliability. Thus, a trade-off is required between power density and reliability during the machine design. Currently, it is a challenging task to evaluate reliability during the design stage and the over-engineering approach is applied. To solve this problem, physics of failure (POF) is introduced and its feasibility for electrical machine (EM) design is discussed through reviewing past work on insulation investigation. Then the special focus is given to partial discharge (PD) whose occurrence means the end-of-life of low-voltage EMs. The PD-free design methodology based on understanding the physics of PD is presented to substitute the over-engineering approach. Finally, a comprehensive reliability-oriented design (ROD) approach adopting POF and PD-free design strategy is given as a potential solution for reliable and high-performance inverter-fed low-voltage EM design.


Author(s):  
Devdatta Kulkarni ◽  
Sandeep Ahuja ◽  
Sanjoy Saha

Continuously increasing demand for higher compute performance is pushing for improved advanced thermal solutions. In high performance computing (HPC) area, most of the end users deploy some sort of direct or indirect liquid cooling thermal solutions. But for the users who have air cooled data centers and air cooled thermal solutions are challenged to cool next generation higher Thermal Design Power (TDP) processors in the same platform form factor without changing environmental boundary conditions. This paper presents several different advanced air cooled technologies developed to cool high TDP processors in the same form factor and within the same boundary conditions of current generation processor. Comparison of thermal performance using different cooling technologies such as Liquid Assist Air Cooling (LAAC) and Loop Heat Pipe (LHP) are presented in this paper. A case study of Intel’s Knights Landing (KNL) processor is presented to show case the increase in compute performance due to different advanced air cooling technologies.


Author(s):  
Philipp Epple ◽  
Mihai Miclea ◽  
Christian Luschmann ◽  
Caslav Ilic ◽  
Antonio Delgado

The use of high speed radial impellers is very common in fans for industrial application. It is very common also to manufacture the radial impellers for these fans with circular arc blades. The design process is also almost always based on former impeller series and experimental data available. In this work a method is presented to improve the efficiency of radial impellers with a combined analytical and numerical method. This method is based on a new extended analytical formulation of the flow in radial impellers allowing optimizing efficiency in design stage. The blade shapes are computed with an inverse method. The design is then validated by means of CFD computation. Finally a prototype was built and measurements were carried out in a test rig. It is shown also that the design method delivered very good predictions leading to an efficiency increase of 13% of efficiency and a maximum flow rate increase of 11% absolute. The design point was also met. It is also shown that the numerical computations and measurements are in good agreement. An analysis of the CFD results is also presented, giving insight in the substantial flow information inside the old and the new impeller. The method presented is a combined analytical and numerical method suited to design high efficiency radial impellers without the need of a previous impeller series or knowledge of experimental data.


2012 ◽  
Vol 134 (6) ◽  
Author(s):  
Toru Matsushima ◽  
Kazuhiro Izui ◽  
Shinji Nishiwaki

Minimizing brake squeal is one of the most important issues in the development of high performance braking systems. Furthermore, brake squeal occurs due to the changes in unpredictable factors such as the friction coefficient, contact stiffness, and pressure distribution along the contact surfaces of the brake disk and brake pads. This paper proposes a conceptual design method for disk brake systems that specifically aims to reduce the occurrence of low frequency brake squeal at frequencies below 5 kHz by appropriately modifying the shapes of brake system components to obtain designs that are robust against changes in the above unpredictable factors. A design example is provided and the validity of the obtained optimal solutions is then verified through real-world experiments. The proposed optimization method can provide useful design information at the conceptual design stage during the development of robust disk brake systems that maximize the performance while minimizing the occurrence of brake squeal despite the presence of unpredictable usage factors.


2020 ◽  
Vol 309 ◽  
pp. 01014
Author(s):  
Zhimei Zhou ◽  
Yong Wan ◽  
Yin Liu ◽  
Xiaoyan Guo ◽  
Qilin Yin ◽  
...  

As one of the core components of electronic hardware systems, Field Programmable Logic Array (FPGA) device design technology continues to advance under the guidance of electronic information technology policies, and has made information technology applications. huge contribution. However, with the advancement of chip technology and the continuous upgrading of information technology, the functions that FPGAs need to perform are more and more complicated. How to efficiently perform layout design and make full use of chip resources has become an important technology to be solved and optimized in FPGA design. The FPGA itself is not limited to a specific function. It contains internal functions such as memory, protocol module, clock module, high-speed interface module and digital signal processing. It can be programmed through logic modules such as programmable logic unit modules and interconnects. Blank FPGA devices are designed to be high performance system applications with complex functions. The layout and routing technology based on cluster logic unit blocks can combine the above resources to give full play to its performance advantages, and its importance is self-evident. Based on the traditional FPGA implementation, this paper analyzes several advantages based on cluster logic block layout and routing technology, and generalizes the design method and flow based on cluster logic block layout and routing technology.


Author(s):  
P Epple ◽  
B Karic ◽  
Č Ilić ◽  
S Becker ◽  
F Durst ◽  
...  

The use of high-speed radial impellers is very common in blowers for industrial application. It is also very common to manufacture these impellers using circular arc blades. The design process as well is almost always based on former impeller series and experimental data available. In this work, a method is presented to improve the efficiency of radial impellers with a combined analytical and numerical method. This method is based on an extended analytical formulation of the flow in radial impellers, allowing optimizing efficiency in the design stage. It is complemented by the mathematical implementation of a well-known qualitative principle of efficiency optimization according to Carnot. Finally, the torque-speed characteristic of the motor is included in the design stage. The blade shapes are computed using an inverse method. The design is then validated by means of computational fluid dynamics (CFD) computation with a commercial solver. Finally, a prototype was built and measurements were carried out in a test rig. It is also shown that the design method provided very good predictions leading to an efficiency increase of 13 per cent and a maximum flowrate increase of 11 per cent. The design point was also met. It is also shown that the numerical computations and measurements are in good agreement. An analysis of the CFD results is also presented, giving an insight view into the substantial flow information within the old and the new impellers. The method presented is a combined analytical and numerical method suited to design high-efficiency radial impellers considering also the torque-speed characteristic of the motor without the need of a previous impeller series or knowledge of experimental data.


MRS Bulletin ◽  
2003 ◽  
Vol 28 (1) ◽  
pp. 21-34 ◽  
Author(s):  
Vasudeva P. Atluri ◽  
Ravi V. Mahajan ◽  
Priyavadan R. Patel ◽  
Debendra Mallik ◽  
John Tang ◽  
...  

AbstractHistorically, the primary function of microprocessor packaging has been to facilitate electrical connectivity of the complex and intricate silicon microprocessor chips to the printed circuit board while providing protection to the chips from the external environment. However, as microprocessor performance continues to follow Moore's law, the package has evolved from a simple protective enclosure to a key enabler of performance. The art and science of semiconductor packaging has advanced radically over the past few decades as faster and more powerful microprocessors with tens of millions of transistors continue to be available, which require more signal and power input/output connections as well as greater power-dissipation capabilities. Key drivers for the development of packaging technologies include power delivery, thermal management, and interconnect scaling, in which the space transformation from fine-featured silicon interconnects to the relatively coarse features seen on motherboards has to be enabled by the package. These drivers, under constant market-driven cost pressure, have led to increased demands on new materials and new package architectures to enable silicon performance. Significant advances have already been made in the areas of heat dissipation, power delivery, high-speed signaling, and high-density interconnects. It is expected that the future evolution of microprocessors will be increasingly challenging in these areas. This article focuses on providing a broad perspective view of the evolution of microprocessor packaging and discusses future challenges.


2008 ◽  
Vol 392-394 ◽  
pp. 787-792
Author(s):  
M. Wu ◽  
Xi Lin Zhu

The architecture and operation theory of Giant Magnetostrictive Accurate-motion Actuator have been introduced. After analysing the driving characteristic of giant magnetostrictive material and requirement of driving power, a design method of wide range and high precision NC constant-current source has been put out. The output circuit is composed of serial 12-bit DACs Max531, low-noise high-speed precision operational amplifiers OP27 and driving circuit. It provides current from 0 to 2.048A with 0.5mA step value. Two fully differential input channels 16-bit, sigma-delta ADCs AD7705 collects output current in feedback loop. Current ripple is controlled under 0.25mA through using homemade high-performance linear power. The result shows that the driving power with characteristic of high stability and fast response meets the needs of driving of Giant Magnetostrictive Accurate-motion.


1972 ◽  
Vol 94 (1) ◽  
pp. 250-254 ◽  
Author(s):  
K. Kanzaki ◽  
K. Itao

This paper describes a cam design method for typehead positioning in high-speed teleprinters. By this method, residual vibrations are extinguished at plural adjacent rise times and reduced over a comparatively wide range of rise times. The polynomial equations for the cam followers are determined upon consideration of the boundary conditions and the characteristics of the residual vibrations. The theoretical results are verified by the experiments.


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