In Situ Chip Stress Extractions for LFBGA Packages Through Piezoresistive Sensors

2009 ◽  
Vol 131 (3) ◽  
Author(s):  
Ben-Je Lwo ◽  
Jeng-Shian Su ◽  
Hsien Chung
Keyword(s):  
Stress Measurements ◽  
Piezoresistive Sensors ◽  
Stress Sensors ◽  
Compressive Stresses ◽  
Fine Pitch ◽  
Low Profile ◽  
Quad Flat Package ◽  
On Chip ◽  
Test Chips

Piezoresistive sensors have been demonstrated to be an accurate and efficient tool for stress measurements on chip surfaces inside microelectronic packaging. In this work, test chips with piezoresistive stress sensors, diode temperature sensors as well as heaters were first designed, fabricated, and calibrated. We next packaged the test chips into low profile, fine pitch ball grid array (LFBGA) packaging with 196 balls and measured the stresses on chip surfaces inside the packaging. After measuring the packaging induced stress as well as the stress under stable environmental temperature rises, it was found that compressive stresses were obtained at room temperature, and the stresses were relaxed as temperature went up at a rate between 0.45 MPa/°C and 0.60 MPa/°C. For thermo-stress experiments, the temperatures on chip surfaces at different power levels were measured, and compressive chip stresses were first extracted. As the chip power increased, the compressive stresses became tensions. Since the LFBGA structure is thinner with higher packaging efficiency, different results from our earlier plastic quad flat package stress measurements were observed and discussed. In addition, the final comparisons between the experimental data and the finite element simulations show good consistency.

In-Plane Packaging Stress Measurements Through Piezoresistive Sensors

2002 ◽  
Vol 124 (2) ◽  
pp. 115-121 ◽  
Author(s):  
Ben-Je Lwo ◽  
Tung-Sheng Chen ◽  
Ching-Hsing Kao ◽  
Yu-Lin Lin
Keyword(s):  
Thermal Stresses ◽  
Temperature Sensors ◽  
Internal Stresses ◽  
Microelectronic Packaging ◽  
Stress Measurements ◽  
Piezoresistive Sensors ◽  
Stress Sensors ◽  
Induced Stresses ◽  
Packaging Structure ◽  
Test Chips

In our previous works, the piezoresistive sensors have been demonstrated to be accurate and efficient tools for stress measurements in microelectronic packaging. In this study, we first designed test chips with piezoresistive stress sensors, temperature sensors as well as heats, and the test wafers were next manufactured through commercialized IC processes. Piezoresistive sensors on silicon strips, which were cut directly from silicon wafers at a specific angle, were then calibrated, and highly consistent piezoresistive coefficients were extracted at various wafer sites so that both normal and shear stress on the test chips can be measured. Finally, we packaged the test chips into 100-pin PQFP structures with different batches and measured internal stresses on the test chips inside the packaging. After measuring packaging induced stresses as well as thermal stresses on several batches of PQFPs, it was found that the normal stress diversities were obvious from different batches of the packaging structure, and the shearing stresses were approximately zero in all of the PQFPs at different chip site.

Piezoresistive Stress Sensors for Structural Analysis of Electronic Packages

1991 ◽  
Vol 113 (3) ◽  
pp. 203-215 ◽  
Author(s):  
D. A. Bittle ◽  
J. C. Suhling ◽  
R. E. Beaty ◽  
R. C. Jaeger ◽  
R. W. Johnson
Keyword(s):  
Integrated Circuit ◽  
Structural Reliability ◽  
Lattice Structure ◽  
Three Dimensional ◽  
Electronic Packages ◽  
Cubic Symmetry ◽  
Piezoresistive Sensors ◽  
Stress Sensors ◽  
Die Stress ◽  
Test Chips

Structural reliability of electronic packages has become an increasing concern for a variety of reasons including the advent of higher integrated circuit densities, power density levels, and operating temperatures. A powerful method for experimental evaluation of die stress distributions is the use of test chips incorporating integral piezoresistive sensors. In this paper, the theory of conduction in piezoresistive materials is reviewed and the basic equations applicable to the design of stress sensors on test chips are presented. General expressions are obtained for the stress-induced resistance changes which occur in arbitrarily oriented one-dimensional filamentary conductors fabricated out of crystals with cubic symmetry and diamond lattice structure. These relations are then applied to obtain basic results for stressed in-plane resistors fabricated into the surface of (100) and (111) oriented silicon wafers. Sensor rosettes developed by previous researchers for each of these wafer orientations are reviewed and more powerful rosettes are presented along with the equations needed for their successful application. In particular, a new sensor rosette fabricated on (111) silicon is presented which can measure the complete three-dimensional stress state at points on the surface of a die

Measurement of Stress and Delamination in Flip Chip on Laminate Assemblies

2003 ◽  
Author(s):  
M. Kaysar Rahim ◽  
Jeffrey C. Suhling ◽  
D. Scott Copeland ◽  
Richard C. Jaeger ◽  
Pradeep Lall
Keyword(s):  
Flip Chip ◽  
Acoustic Microscopy ◽  
Valuable Insight ◽  
Stress Distributions ◽  
Environmental Testing ◽  
Stress Measurements ◽  
Piezoresistive Sensors ◽  
Die Stress ◽  
Test Chips ◽  
Stress Variations

Mechanical stress distributions in packaged silicon die that have resulted during assembly or environmental testing can be accurately characterized using test chips incorporating integral piezoresistive sensors. In this paper, an overview of recent measurements made in flip chip on laminate assemblies with (111) silicon test chips is presented. Transient die stress measurements have been made during underfill cure, and the room temperature die stresses in final cured assemblies have been compared for several different underfill encapsulants. The experimental stress measurements in the flip chip samples were then correlated with finite element predictions for the tested configurations. In addition, stress variations have been monitored in the assembled flip chip die as the test boards were subjected to slow temperature changes from −40 to +150°C. Finally the stress variations occurring during thermal cycling from −40 to +125°C have been characterized. These measurements have been correlated with the delaminations occurring at the die passivation to underfill interface measured using C-mode Scanning Acoustic Microscopy (C-SAM). Using the measurements and numerical simulations, valuable insight has been gained on the effects of assembly variables and underfill material properties on the reliability of flip chip packages.

scholarly journals Investigation of TSV Induced Thermo-Mechanical Stress: Implementation of Piezoresistive Sensors and Correlation with Simulation

2014 ◽  
Vol 996 ◽  
pp. 975-981
Author(s):  
Komi Atchou Ewuame ◽  
Vincent Fiori ◽  
Karim Inal ◽  
Pierre Olivier Bouchard ◽  
Sebastien Gallois-Garreignot ◽  
...  
Keyword(s):  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Stress Fields ◽  
Electrical Measurements ◽  
Test Vehicle ◽  
Piezoresistive Sensors ◽  
Microelectronic Devices ◽  
Stress Sensors ◽  
Calibration Coefficients

This work deals with a methodology to evaluate residual stresses within microelectronic devices by using MOS (Metal Oxide Semiconductor) rosette stress sensors. The stress tensor was evaluated by carrying out electrical measurements on test vehicle: the bridge from electrical to stress values was ensured by the piezoresistive relations and, prior to further in-house calibration, coefficients from literature were employed. For correlation purpose, numerical simulations were performed in order to evaluate stresses induced by TSV (Through Silicon Via). In this paper, the whole framework is described, and stress fields evaluated from in-situ electrical measurements on CMOS65 rosette sensor are compared to simulated ones. Some of the ultimate targets of this work are to develop a validated framework to deeply understand TSV induced thermo-mechanical stresses and to allow design rules definitions for products reliability and transistor performances.

scholarly journals On the relationship between local stresses and strains in Arctic pack ice

1991 ◽  
Vol 15 ◽  
pp. 265-270
Author(s):  
W. B. Tucker ◽  
D. K. Perovich ◽  
M. A. Hopkins ◽  
W. D. Hibler
Keyword(s):  
Principal Stress ◽  
Local Strain ◽  
Local Area ◽  
Near Surface ◽  
Stress Sensors ◽  
Compressive Stresses ◽  
Pack Ice ◽  
Wide Range ◽  
Local Stresses

Local ice strains and in situ ice stresses were simultaneously measured on the Coordinated Eastern Arctic Experiment (CEAREX). The experiment took place in the fall of 1988 and was centered about an ice-strengthened ship moored to a multi-year floe in the pack ice northeast of Spitsbergen. During the period of data collection, which extended from early October to late November, the ship and the ice surrounding it drifted from 82°40′N, 32°32′E to 78°54′N, 31°27′E.As soon as ice temperatures were low enough to permit installation, stress sensors were placed at four sites, two sites on each of two adjacent multi-year floes. Principal stress components and the principal stress direction were determined at each sensor. At the same time, microwave transponders, capable of measuring ice deformation to accuracies better than 1 m, were positioned within 1 km of the stress sensors and provided an approximation of the local strain field.What makes this joint dataset particularly interesting is that it includes some large ridging events and a particularly large event which terminated the experiment when the multi-year floes in the local area were broken into small fragments. A wide range of ice stresses was measured during the period. The largest compressive stresses, about 250 kPa, were measured by the near-surface sensors. Although sensors in different locations responded differently to ice movement, the large events were common to all shallow sensors.

On the Study of Piezoresistive Stress Sensors for Microelectronic Packaging

2000 ◽  
Vol 124 (1) ◽  
pp. 22-26 ◽  
Author(s):  
Ben-Je Lwo ◽  
Ching-Hsing Kao ◽  
Tung-Sheng Chen ◽  
Yao-Shing Chen
Keyword(s):  
Input Power ◽  
Microelectronic Packaging ◽  
Piezoresistive Sensors ◽  
Four Point Bending ◽  
Stress Sensors ◽  
Linear Relationships ◽  
Study Test ◽  
As Stress ◽  
Test Chips ◽  
P Type

Stress measurements in microelectronic packaging through piezoresistive sensors take the advantage of both in-situ and nondestructive. In this study, test chips with both p-type and n-type piezoresistive stress sensors, as well as a heat source, were first designed, then manufactured by a commercialized foundry so that the uniformity of the test chips was expected. Both temperature and stress calibrations were next performed through a special designed MQFP (Metal Quad Flat Package) and four-point bending (4PB) structure, respectively. Measurements of stresses which are produced due to both manufacturing process and thermal effects on the test chips were finally executed, and approximately linear relationships were observed between stress and temperature as well as stress and input power. It is concluded that n-type piezoresistive stress sensors are able to extract stress in microelectronic packaging with good accuracy.

scholarly journals On the relationship between local stresses and strains in Arctic pack ice

1991 ◽  
Vol 15 ◽  
pp. 265-270 ◽  
Author(s):  
W. B. Tucker ◽  
D. K. Perovich ◽  
M. A. Hopkins ◽  
W. D. Hibler
Keyword(s):  
Principal Stress ◽  
Local Strain ◽  
Local Area ◽  
Near Surface ◽  
Stress Sensors ◽  
Compressive Stresses ◽  
Pack Ice ◽  
Wide Range ◽  
Local Stresses

Local ice strains and in situ ice stresses were simultaneously measured on the Coordinated Eastern Arctic Experiment (CEAREX). The experiment took place in the fall of 1988 and was centered about an ice-strengthened ship moored to a multi-year floe in the pack ice northeast of Spitsbergen. During the period of data collection, which extended from early October to late November, the ship and the ice surrounding it drifted from 82°40′N, 32°32′E to 78°54′N, 31°27′E. As soon as ice temperatures were low enough to permit installation, stress sensors were placed at four sites, two sites on each of two adjacent multi-year floes. Principal stress components and the principal stress direction were determined at each sensor. At the same time, microwave transponders, capable of measuring ice deformation to accuracies better than 1 m, were positioned within 1 km of the stress sensors and provided an approximation of the local strain field. What makes this joint dataset particularly interesting is that it includes some large ridging events and a particularly large event which terminated the experiment when the multi-year floes in the local area were broken into small fragments. A wide range of ice stresses was measured during the period. The largest compressive stresses, about 250 kPa, were measured by the near-surface sensors. Although sensors in different locations responded differently to ice movement, the large events were common to all shallow sensors.

scholarly journals Laser-excited elastic guided waves reveal the complex mechanics of nanoporous silicon

2021 ◽  
Vol 12 (1) ◽  
Author(s):  
Marc Thelen ◽  
Nicolas Bochud ◽  
Manuel Brinker ◽  
Claire Prada ◽  
Patrick Huber
Keyword(s):  
Guided Waves ◽  
Laser Ultrasonics ◽  
Bulk Silicon ◽  
Nanoporous Silicon ◽  
Stiffness Reduction ◽  
Mechanical Characterisation ◽  
Isotropic Elasticity ◽  
On Chip ◽  
Non Destructive

AbstractNanoporosity in silicon leads to completely new functionalities of this mainstream semiconductor. A difficult to assess mechanics has however significantly limited its application in fields ranging from nanofluidics and biosensorics to drug delivery, energy storage and photonics. Here, we present a study on laser-excited elastic guided waves detected contactless and non-destructively in dry and liquid-infused single-crystalline porous silicon. These experiments reveal that the self-organised formation of 100 billions of parallel nanopores per square centimetre cross section results in a nearly isotropic elasticity perpendicular to the pore axes and an 80% effective stiffness reduction, altogether leading to significant deviations from the cubic anisotropy observed in bulk silicon. Our thorough assessment of the wafer-scale mechanics of nanoporous silicon provides the base for predictive applications in robust on-chip devices and evidences that recent breakthroughs in laser ultrasonics open up entirely new frontiers for in-situ, non-destructive mechanical characterisation of dry and liquid-functionalised porous materials.

scholarly journals Controlled density glycodendron microarrays for studying carbohydrate–lectin interactions

2021 ◽  
Author(s):  
Antonio Di Maio ◽  
Anna Cioce ◽  
Silvia Achilli ◽  
Michel Thépaut ◽  
Corinne Vivès ◽  
...  
Keyword(s):  
Maldi Tof Ms ◽  
Maldi Tof ◽  
On Chip ◽  
Tof Ms

Density depended binding and selectivity is studied on glycodendron microarray with defined valency, which were prepared by on-chip synthesis and analysed by in situ MALDI-TOF MS.

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