Experimental and Analytical Studies of 28-Pin Thin Small Outline Package (TSOP) Solder-Joint Reliability

1992 ◽  
Vol 114 (2) ◽  
pp. 169-176 ◽  
Author(s):  
J. Lau ◽  
S. Golwalkar ◽  
S. Erasmus ◽  
R. Surratt ◽  
P. Boysan

The reliability of 0.5 mm pitch, 28-Pin Thin Small Outline Package (TSOP) solder joints has been studied by experimental temperature cycling and a cost-effective 3-D nonlinear finite element analysis. Temperature cycling results have been presented as a Weibull distribution, and an acceleration factor has been established for the failure rate at operating conditions. Thermal fatigue life of the corner solder joints has been estimated based on the calculated plastic strain, Coffin-Manson equation, and isothermal fatigue data on solders. A correlation between the experimental and analytical results has also been made. Furthermore, failure analysis of the solder joints has been performed using Scanning Electron Microscopy (SEM) and an optical method.

Author(s):  
Chang-Chun Lee ◽  
Kuo-Shu Kao ◽  
Hou-Chun Liu ◽  
Chia-Ping Hsieh ◽  
Tao-Chih Chang

Abstract To overcome the limited operational speed for nano-scaled transistors, scaling electronic devices to small and thin packaging and high-density arrangements have become the technological mainstream in designing versatile packaging architectures. Among these, a promising candidate is the 3D-IC package due to its excellent capability of heterogeneous integration. However, sequential reliability is a troublesome concern given the complex packaging structure, especially for the assembly of micro solder joints. To address this issue, we propose a double-layered, thin stacked chip package under the application of temperature cycling load. The packaging warpage and creep impact of SnAg micro solder joints on their fatigue lifespan are examined separately. Nonlinear material/geometry finite element analysis is used on important designed factors, including the elastic modulus of underfill, chip thickness, and the radius and pitch of through silicon via (TSV). The simulated results indicate that the best fatigue lifetime of SnAg micro solder joint can be achieved at 10 µm of each chip thickness, 230 and 5 µm for TSV pitch and radius within the examined designed extent. Moreover, a hard underfill material requires consideration when the mounted chips thicken. Consequently, reliability significantly improves by dispersing thermo-mechanical stress/strain of the SnAg microjoints to neighboring underfill and related packaging components, especially for large TSV array spacing.


1993 ◽  
Vol 115 (3) ◽  
pp. 322-328 ◽  
Author(s):  
John Lau ◽  
Steve Erasmus

The thermal and mechanical responses of a 304-Pin, 0.5 mm pitch, 40 mm by 40 mm body size plastic quad flat pack (QFP) solder joints and leads have been determined in this study. The thermal stress and strain in the leads and solder joints have been obtained by a 3-D nonlinear finite element method and the thermal fatigue life of the QFP corner solder joint was then estimated based on the calculated plastic strains, Coffin-Manson law, and isothermal fatigue data of solders. The effects of overload environmental stress factors on the mechanical responses of the leads and solder joints have been determined by bending and twisting experiments.


2001 ◽  
Vol 42 (5) ◽  
pp. 809-813 ◽  
Author(s):  
Young-Eui Shin ◽  
Kyung-Woo Lee ◽  
Kyong-Ho Chang ◽  
Seung-Boo Jung ◽  
Jae Pil Jung

Author(s):  
Naveen Viswanatha ◽  
Mark Avis ◽  
Moji Moatamedi

The surround and the spider of the loudspeaker suspension are modelled in ANSYS to carry out finite element analysis. The displacement dependent nonlinearities arising from the suspension are studied and the material and geometric effects leading to the nonlinearities are parameterised. The ANSYS models are simulated to be excited by a sinusoidal load and the results are evaluated by comparison with the results obtained by a physical model. The paper illustrates how practical models can be analysed using cost effective finite element models and also the extension of the models to experiment on various parameters, like changing the geometry for optimisation, by computer simulation.


Author(s):  
Walter Dauksher ◽  
John Lau

Finite element analysis examines lead-free part-on-board accelerated thermal environments comprised of ramp and dwell times lasting between 5 and 15 minutes. The accumulated creep strain energy density is determined for each environment and used to evaluate cost-effective accelerated test environments.


2013 ◽  
Vol 2013 (DPC) ◽  
pp. 001870-001893
Author(s):  
Rajesh Katkar ◽  
Zhijun Zhao ◽  
Ron Zhang ◽  
Rey Co ◽  
Laura Mirkarimi

Existing Package-on-Package (PoP) solutions are rapidly approaching the logic memory bandwidth capacity in the multi-core mobile processor packages. Package on Package stack using the conventional solder balls has a serious pitch limitation below 400um. The through mold via interconnects may reduce the pitch to 300um; however, this technology is believed to reach a limitation below 300 um. Other approaches including the use of PCB interposers between the Logic and the memory face similar challenges; however, they are cumbersome in the assembly process and expensive. Although Through Silicon Via stacking is expected to achieve the ultimate high bandwidth required to support multi-core mobile processors, the technology must overcome the challenges in process, infrastructure, supply chain and cost. Bond Via Array (BVA) technology addresses all of these issues while enabling high bandwidth PoP stacking of more than 1000 high aspect ratio interconnects at less than 200um within the standard package footprint. BVA is a cost effective, ultra-fine pitch, high density PoP stacking solution that will assist in driving high logic-memory bandwidth applications with standard assembly equipment and processes. This is achieved by encapsulating the logic package after forming free-standing wire bonds along the periphery of its flip chip substrate. The wire protrusions formed above the mold cap at the top of the package are then connected to the BGA at the bottom of the memory package during a standard reflow operation. In this work, the initial evaluation test vehicle with 432 PoP interconnects at 240um pitch within a standard 14 x 14mm package foot print is demonstrated. The important technological challenges we overcame to fabricate the first prototypes will be discussed. The reliability performance describing the temperature cycling, high temperature storage, autoclave and drop testing will be discussed. Finite element analysis modeling used to optimize the package structure will be presented.


Author(s):  
Deng Yun Chen ◽  
Michael Osterman

Solder interconnects in electronic assemblies are susceptible to failures due to environmental high strain rate impact and cyclic stresses. To mitigate the failures, adhesive bonds can be added after the solder assembly process to provide additional mechanical support. For ball grid array (BGA) packages, the adhesive is normally applied to the corners of the package and referred to as corner staking. In addition to corner staking, underfill is also a strategy used to mitigate the stresses on the solder joints. While components with underfill has been widely studied, the study of the impact of corner staking on the reliability of packages remains limited. This paper presents a study of corner-staked BGA packages with tin-3.0 silver-0.5 copper (SAC305) solder subjected to temperature cycling. Experimental temperature cycling is conducted to examine impact of the selected corner staking material on the fatigue life of BGAs. Further, finite element analysis is conducted to understand the influence of material properties of staking material on the fatigue life of BGAs. The result of the study indicates that the presence of corner staking, with selected material properties, reduces the damage on the solder joints under thermal cycling, and thus increases its fatigue life by about 80%. This paper may serve as a guidance for staking material selection to improve the fatigue life of solder joints of BGAs under thermal cycling.


Author(s):  
T. E. Wong ◽  
C. Y. Lau ◽  
L. A. Kachatorian ◽  
H. S. Fenger ◽  
I. C. Chen

The objective of the present study is to evaluate the impact of electronic packaging design/manufacturing process parameters on the thermal fatigue life of ball grid array (BGA) solder joints. The four selected parameters are BGA under-fill materials, conformal coating, solder pad sizes on printed wiring board, and BGA rework, with each having either two or three levels of variation. A test vehicle (TV), on which various sizes of BGA daisy-chained packages are soldered, is first designed and fabricated, and then subjected to temperature cycling (−55°C to +125°C) with continuous monitoring of solder joint integrity. The total of 15 experimental cases is used in the present study. Based on monitored results, a destructive physical analysis is conducted to further isolate the failure locations and determine the failure mechanisms of the solder joints. Test results indicate that the influence of these design parameters on fatigue life is dependent on the particular package, in some instances improving the fatigue life tenfold.


2007 ◽  
Vol 353-358 ◽  
pp. 2932-2935
Author(s):  
Yong Cheng Lin ◽  
Xu Chen ◽  
Xing Shen Liu ◽  
Guo Quan Lu

The reliability of solder joints in flip chip assemblies with both compliant (flex) and rigid (PCB) substrates was studied by accelerated temperature cycling tests and finite element modeling (FEM). In-process electrical resistance measurements and nondestructive evaluations were conducted to monitor solder joint failure behavior, hence the fatigue failure life. Meanwhile, the predicted fatigue failure life of solder joints was obtained by Darveaux’s crack initiation and growth models. It can be concluded that the solder joints in flip chip on flex assembly (FCOF) have longer fatigue life than those in flip chip on rigid board assembly (FCOB); the maximum von Mises stress/strain and the maximum shear stress/strain of FCOB solder joints are much higher than those of FCOF solder joints; the thermal strain and stress in solder joints is reduced by flex buckling or bending and flex substrate could dissipate energy that otherwise would be absorbed by solder joint. Therefore, the substrate flexibility has a great effect on solder joint reliability and the reliability improvement was attributed to flex buckling or bending during temperature cycling.


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