Micro-Mechanical Deformation Analysis of Surface Laminar Circuit in Organic Flip-Chip Package: An Experimental Study

2000 ◽  
Vol 122 (4) ◽  
pp. 294-300 ◽  
Author(s):  
B. Han ◽  
P. Kunthong

Thermo-mechanical deformations of microstructures in a surface laminar circuit (SLC) substrate are quantified by microscopic moire´ interferometry. Two specimens are analyzed; a bare SLC substrate and a flip chip package assembly. The specimens are subjected to a uniform thermal loading of ΔT=−70°C and the microscopic displacement fields are documented at the identical region of interest. The nano-scale displacement sensitivity and the microscopic spatial resolution obtained from the experiments provide a faithful account of the complex deformation of the surface laminar layer and the embedded microstructures. The displacement fields are analyzed to produce the deformed configuration of the surface laminar layer and the strain distributions in the microstructures. The high modulus of underfill produces a strong coupling between the chip and the surface laminar layer, which produces a DNP-dependent shear deformation of the layer. The effect of the underfill on the deformation of the microstructures is investigated and its implications on the package reliability are discussed. [S1043-7398(00)01304-9]

1976 ◽  
Vol 98 (1) ◽  
pp. 17-25 ◽  
Author(s):  
T. R. Hsu ◽  
A. W. M. Bertels

The present investigation deals with the propagation and opening of a single crack in a thin wall pipe subject to cyclic pressure and thermal loading. A thermoelastic-plastic analysis based on the finite element variational technique is used to calculate the stress and displacement fields in the vicinity of the growing crack. A special type of element known as a “breakable element” is developed to model the gradual propagation of the crack. Kinematic work hardening is included to account for the Bauschinger effect of the pipe material when subjected to cyclic plastic deformation.


2011 ◽  
Vol 308-310 ◽  
pp. 2328-2333
Author(s):  
Li Fu Li

The thermal control indicators CAE methods of Space optical remote sensor are analyzed in the presented work. We sat up a thermal optical analysis model for space optical remote sensor. By assuming fully covered by in-orbit temperature load, and using the finite element method for thermal deformation analysis, we obtained the optical remote sensor surface deformation and displacement under various thermal loading. Using ZERNIKE polynomial, wave was fitted to obtain ZERNIKE polynomial coefficients which were incorporated into the optical system design. Using CODE V optical calculation software, heat-ray machines under elastic deformation of the system point spread function, transfer function (MTF), wave front differential (WFE) etc. were calculated. Image quality changes of remote sensors are discussed in variety assumed cases such as temperature loads of quality change. By repeated iteration, critical value of temperature fields meeting the design requirements are obtained for the optical system. Optical indicators were converged to the temperature field indicator, then reasonable indicators of thermal control for remote sensors were obtained. For the thermal control design, this method provided a reliable basis for design.


2020 ◽  
Vol 2020 (1) ◽  
pp. 000125-000130
Author(s):  
Leo Hu ◽  
Sze Pei Lim

Abstract With the leap into the 5G era, the demand for improvements in the performance of mobile phones is on the rise. This is also true for the quantity of radio frequency (RF) front-end integrated circuits (ICs), especially for RF switches and low noise amplifiers (LNA). It is well-known that improvements in performance depend on the combination of new design, package technology, and choice of materials. Ultra-low residue (ULR) flux is an innovative, truly no-clean, flip-chip bonding material. By using ULR flux, the typical water-wash cleaning process can be removed and, in some instances, package reliability can be improved as well. This simplified assembly process will help to reduce total packaging costs. This paper will discuss the application of ULR fluxes on land grid arrays (LGAs) and quad-flat no-leads/dual-flat no-leads (QFN/DFN) packages for RF front-end ICs, as well as the reflow process. The solder joint strength and reliability study will be shared as well.


2003 ◽  
Vol 125 (3) ◽  
pp. 400-413 ◽  
Author(s):  
Ji Eun Park ◽  
Iwona Jasiuk ◽  
Aleksander Zubelewicz

Flip chip assemblies used in electronic packaging consist of three main components (layers): chip, underfill, and substrate. In this paper, the flip chip assembly is represented as a bi-material strip consisting of the chip and underfill. Our analysis is focused on delamination along the chip-underfill interface due to thermal loading. The underfill is modeled as a composite material made of a polymer matrix and silica particles. Interfacial stresses are studied for several particle configurations: cases of one, two, or three particles near the interface and 30 different random particle arrangements. Interfacial fracture is investigated by evaluating the J integral and stress intensity factors. Statistics of random particle arrangements in the underfill are also discussed. The interfacial stress and fracture analyses give the same trends.


Author(s):  
Abm Hasan ◽  
H. Mahfuz ◽  
M. Saha ◽  
S. Jeelani

Flip-chip electronic package undergoes thermal loading during its curing process and operational life. Due to the thermal expansion coefficient (CTE) mismatch of various components, the flip-chip assembly experiences various types of thermally induced stresses and strains. Experimental measurement of these stresses and strains is extremely tedious and rigorous due to the physical limitations in the dimensions of the flip-chip assembly. While experiments provide accurate assessment of stresses and strains at certain locations, a parallel finite element (FE) analysis and analytical study can complementarily determine the displacement, strain and stress fields over the entire region of the flip-chip assembly. Such combination of experimental, finite element and analytical studies are ideal to yield a successful stress analysis of the flip-chip assembly under the various loading conditions. In this study, a two-dimensional finite element model of the flip-chip consisting of the silicon chip, underfill, solder ball, copper pad, solder mask and substrate has been developed. Various stress components under thermal loading condition ranging from −40°C to 150°C have been determined using both the finite element and analytical methods. Stresses such as (σ11, σ12, ε12 etc. are extracted and analyzed for the individual components as well as the entire assembly, and the weakest positions of the flip-chip have been discovered. Detailed description of FE modeling is presented and the different failure modes of chip assembly are discussed.


Author(s):  
Tz-Cheng Chiu ◽  
Huang-Chun Lin

The interface crack problem in integrated circuit devices was considered by using global and local modeling approach. In the global analysis the thin film interconnect was modeled by a homogenized layer with material constants obtained from representative volume element (RVE) analysis. Local analyses were then considered to determine fracture mechanics parameters. It was shown that the multiscale model with RVE approach gives accurate fracture mechanics parameters for an interface crack under either thermal or mechanical loads; while significant error was observed when the thin film layers are ignored in the global analysis. The problem of an interface crack between low-k dielectric and etch-stop thin film in a flip-chip package under thermal loading was also investigated as an application example of the multiscale modeling.


1996 ◽  
Vol 445 ◽  
Author(s):  
Xiang Dai ◽  
Connie Kim ◽  
Ralf Willecke ◽  
Paul S. Ho

AbstractAn experimental technique of environmental moiré interferometry has been developed for in‐situ monitoring and analysis of thermomechanical deformation of microelectronics packages subjected to thermal loading under a controlled atmosphere. Coupled with fractional fringe analysis and digital image processing, the environmental moiré interferometry technique achieves accurate and realistic deformation monitoring with high sensitivity and excellent spatial resolution. It has been applied to investigate the thermomechanical deformations induced by thermal loading in an underfilled flip‐chip‐on‐board packaging. The effects of temperature change in the range of 102 °C to 22 °C are analyzed for underfill and solder bumps. In addition, shear deformation and shear strains across the solder bumps are determined as a function of temperature. The experimental results are compared with the results of a finite element analysis for modeling verification. Good agreement between the modeling results and experimental measurements has been found in the overall displacement fields. Through this study, the role of underfill in the thermomechanical deformation of the underfilled flip‐chip package is determined.


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