Implementation of Izhikevich neuron model with field programmable devices

Author(s):  
Nimet Dahasert ◽  
Ismail Ozturk ◽  
Recai Kilic
2015 ◽  
Vol 5 (2) ◽  
pp. 109-119 ◽  
Author(s):  
Sou Nobukawa ◽  
Haruhiko Nishimura ◽  
Teruya Yamanishi ◽  
Jian-Qin Liu

Abstract Several hybrid neuron models, which combine continuous spike-generation mechanisms and discontinuous resetting process after spiking, have been proposed as a simple transition scheme for membrane potential between spike and hyperpolarization. As one of the hybrid spiking neuron models, Izhikevich neuron model can reproduce major spike patterns observed in the cerebral cortex only by tuning a few parameters and also exhibit chaotic states in specific conditions. However, there are a few studies concerning the chaotic states over a large range of parameters due to the difficulty of dealing with the state dependent jump on the resetting process in this model. In this study, we examine the dependence of the system behavior on the resetting parameters by using Lyapunov exponent with saltation matrix and Poincaré section methods, and classify the routes to chaos.


Author(s):  
M. A. Bañuelos-Saucedo ◽  
J. Castillo-Hernández ◽  
S. Quintana-Thierry ◽  
R. Damián-Zamacona ◽  
J. Valeriano-Assem ◽  
...  

Artificial neural networks base their processing capabilities in a parallel architecture, and this makes them useful to solve pattern recognition, system identification, and control problems. In this paper, we present a FPGA (Field Programmable Gate Array) based digital implementation of a McCulloch-Pitts type of neuron model with three types of non-linear activation function: step, ramp-saturation, and sigmoid. We present the VHDL language code used to implement the neurons as well as to present simulation results obtained with Xilinx Foundation 3.0 software. The results are analyzed in terms of speed and percentage of chip usage.


Author(s):  
Seema Nayak ◽  
Manoj Nayak ◽  
Pankaj Pathak

This chapter gives an overview of synthesis and analysis of digital filters on FPGA for denoising ECG signal, which provides clinical information related to heart diseases. Various types of IIR and FIR filtration techniques used for noise removal are also discussed. Many developments in the medical system technology gave birth to monitoring systems based on programmable logic devices (PLDs). Although not new to the realm of programmable devices, field programmable gate arrays (FPGAs) are becoming increasingly popular for rapid prototyping of designs with the aid of software simulation and synthesis. They are reprogrammable silicon chips, configured to implement customized hardware and are highly desirable for implementation of digital filters. The extensive literature review of various types of noise in ECG signals, filtering techniques for noise removal, and FPGA implementation are presented in this chapter.


Sign in / Sign up

Export Citation Format

Share Document