Reliability degradation of high density DRAM cell transistor junction leakage current induced by band-to-defect tunneling under the off-state bias-temperature stress

2002 ◽  
Author(s):  
Young Pil Kim ◽  
Young Wook Park ◽  
Joo Tae Moon ◽  
S.U. Kim
Keyword(s):  
Leakage Current ◽  
Temperature Stress ◽  
High Density ◽  
Bias Temperature Stress

scholarly journals Analysis of Leakage Current in Cu/SiO2/Si/Al Capacitors under Bias-Temperature Stress

2003 ◽  
Vol 42 (Part 1, No. 10) ◽  
pp. 6384-6389 ◽  
Author(s):  
Hirotaka Nishino ◽  
Takuya Fukuda ◽  
Hiroshi Yanazawa ◽  
Hironori Matsunaga
Keyword(s):  
Leakage Current ◽  
Temperature Stress ◽  
Bias Temperature Stress

Impact of Metal Pad Etch-Induced Plasma Damage on Dynamic Retention Time Degradation during High Temperature Stress in High Density DRAM Technology

2005 ◽  
Author(s):  
D-J Kim ◽  
I-G Kim ◽  
J-Y Noh ◽  
H-J Lee ◽  
S-H Park ◽  
...  
Keyword(s):  
High Temperature ◽  
Temperature Stress ◽  
Retention Time ◽  
High Temperature Stress ◽  
High Density ◽  
Cell Junction ◽  
Antenna Effect ◽  
Plasma Damage ◽  
Root Cause ◽  
Wafer Processing

Abstract As DRAM technology extends into 12-inch diameter wafer processing, plasma-induced wafer charging is a serious problem in DRAM volume manufacture. There are currently no comprehensive reports on the potential impact of plasma damage on high density DRAM reliability. In this paper, the possible effects of floating potential at the source/drain junction of cell transistor during high-field charge injection are reported, and regarded as high-priority issues to further understand charging damage during the metal pad etching. The degradation of block edge dynamic retention time during high temperature stress, not consistent with typical reliability degradation model, is analyzed. Additionally, in order to meet the satisfactory reliability level in volume manufacture of high density DRAM technology, the paper provides the guidelines with respect to plasma damage. Unlike conventional model as gate antenna effect, the cell junction damage by the exposure of dummy BL pad to plasma, was revealed as root cause.

Drain bias dependent bias temperature stress instability in a-Si:H TFT

2009 ◽  
Vol 53 (2) ◽  
pp. 225-233 ◽  
Author(s):  
Z. Tang ◽  
M.S. Park ◽  
S.H. Jin ◽  
C.R. Wie
Keyword(s):  
Temperature Stress ◽  
Drain Bias ◽  
Bias Temperature Stress
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