Leveraging Virtual Prototype Models for Hardware Verification of an Accelerated Network Packet Processing Engine

2015 ◽  
Author(s):  
Sourav Roy ◽  
Nikhil Jain ◽  
Sandeep Jain ◽  
Robert Page
Keyword(s):  
Virtual Prototype ◽  
Hardware Verification ◽  
Packet Processing ◽  
Processing Engine

Design and performance evaluation of a Programmable Packet Processing Engine (PPE) suitable for high-speed network processors units

2007 ◽  
Vol 31 (3) ◽  
pp. 188-199 ◽  
Author(s):  
K. Vlachos ◽  
T. Orphanoudakis ◽  
Y. Papaeftathiou ◽  
N. Nikolaou ◽  
D. Pnevmatikatos ◽  
...  
Keyword(s):  
Performance Evaluation ◽  
High Speed ◽  
Packet Processing ◽  
Network Processors ◽  
High Speed Network ◽  
And Performance ◽  
Processing Engine

ETA: experience with an intel xeon processor as a packet processing engine

IEEE Micro ◽  
2004 ◽  
Vol 24 (1) ◽  
pp. 24-31 ◽  
Author(s):  
G. Regnier ◽  
D. Minturn ◽  
G. McAlpine ◽  
V.A. Saletore ◽  
A. Foong
Keyword(s):  
Packet Processing ◽  
Processing Engine ◽  
Intel Xeon
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