Mitigating the Effects of Process Variation in Ultra-low Voltage Chip Multiprocessors using Dual Supply Voltages and Half-Speed Units

2012 ◽  
Vol 11 (2) ◽  
pp. 45-48 ◽  
Author(s):  
Timothy N. Miller ◽  
Renji Thomas ◽  
Radu Teodorescu
Keyword(s):  
Chip Multiprocessors ◽  
Low Voltage ◽  
Process Variation ◽  
Supply Voltages

High-Performance Low Voltage Organic Thin-Film Transistors

2005 ◽  
Vol 870 ◽  
Author(s):  
Stijn De Vusser ◽  
Soeren Steudel ◽  
Kris Myny ◽  
Jan Genoe ◽  
Paul Heremans
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
High Performance ◽  
Low Voltage ◽  
Supply Voltage ◽  
Organic Thin Film Transistors ◽  
Ring Oscillator ◽  
Ring Oscillators ◽  
Organic Thin Film ◽  
Supply Voltages

AbstractIn this work, we report on high-performance low voltage pentacene Organic Thin-Film Transistors (OTFT's) and circuits. Inverters and ring oscillators have been designed and fabricated. At 15 V supply voltage, we have observed invertors showing a voltage gain of 9 and an output swing of more than 13 V. As for the ring oscillators, oscillations started at supply voltages as low as 8.5 V. At a supply voltage of only 15 V, a stage delay time of 3.3 νs is calculated from experimental results.We believe that these results show for the first time a high speed ring oscillator at relatively low supply voltages. The required supply voltages can be obtained by rectification using an organic (pentacene) diode. These results may have an important impact on the realization of RF-ID tags: by integrating our circuits with an organic diode, the fabrication of organic RF-ID tags comes closer.

Multi-stage dual replica bit-line delay technique for process-variation-robust timing of low voltage SRAM sense amplifier

2015 ◽  
Vol 16 (8) ◽  
pp. 700-706 ◽  
Author(s):  
Shou-biao Tan ◽  
Wen-juan Lu ◽  
Chun-yu Peng ◽  
Zheng-ping Li ◽  
You-wu Tao ◽  
...  
Keyword(s):  
Low Voltage ◽  
Process Variation ◽  
Sense Amplifier ◽  
Multi Stage

scholarly journals DESIGN OF LOW VOLTAGE LOW POWER OPERATIONAL AMPLIFIER

2015 ◽  
pp. 257-261
Author(s):  
M.I.SUDHA RAYAPPA ◽  
V. SURENDRA BABU
Keyword(s):  
Power Supply ◽  
Power Dissipation ◽  
Operational Amplifier ◽  
Noise Level ◽  
Low Voltage ◽  
High Gain ◽  
Op Amp ◽  
Technology Improvement ◽  
Supply Voltages ◽  
Analog Systems

This Thesis presents a design of the Folded-cascade operational amplifier which leads to high gain as compared to a normal cascade circuit. In this project; specifications of analog systems into op amp level net-lists of library components is studied and simulated using XILINX. As the power-supply voltages because of the technology improvement and it are desired to reduce power supply to minimize power dissipation, many challenges are faced by the analog designer. One is to keep noise level as possible. The op-amp must be designed to with the ever decreasing power supply voltages. As the power supply voltages begin to approach 2Vt, new technique and new op-amp topology like folded cascade should be used.

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