2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
Latest Publications

TOTAL DOCUMENTS

141

(FIVE YEARS 0)

H-INDEX

(FIVE YEARS 0)

Published By IEEE

9781728123509

Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942094 ◽

2019 ◽

Cited By ~ 4

Author(s):

Jonas Krautter ◽

Dennis R.E. Gnad ◽

Falk Schellenberg ◽

Amir Moradi ◽

Mehdi B. Tahoori

Keyword(s):

Side Channels

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GenUnlock: An Automated Genetic Algorithm Framework for Unlocking Logic Encryption

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942134 ◽

2019 ◽

Cited By ~ 4

Author(s):

Huili Chen ◽

Cheng Fu ◽

Jishen Zhao ◽

Farinaz Koushanfar

Keyword(s):

Genetic Algorithm ◽

Algorithm Framework

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SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942112 ◽

2019 ◽

Author(s):

Darshana Jayasinghe ◽

Aleksandar Ignjatovic ◽

Sri Parameswaran

Keyword(s):

Side Channel ◽

Side Channel Attacks

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The Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942093 ◽

2019 ◽

Cited By ~ 2

Author(s):

Giulia Meuli ◽

Mathias Soeken ◽

Earl Campbell ◽

Martin Roetteler ◽

Giovanni de Micheli

Keyword(s):

Multiplicative Complexity

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elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942075 ◽

2019 ◽

Cited By ~ 2

Author(s):

Wuxi Li ◽

Yibo Lin ◽

David Z. Pan

Keyword(s):

Large Scale

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SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942150 ◽

2019 ◽

Author(s):

Muhammad Yasin ◽

Chongzhi Zhao ◽

Jeyavijayan JV Rajendran

Keyword(s):

High Level Synthesis ◽

Logic Locking ◽

High Level

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Corporate Sponsor of the Technical Program Committee Dinner

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942067 ◽

2019 ◽

Keyword(s):

Program Committee ◽

Technical Program Committee ◽

Technical Program ◽

Corporate Sponsor

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2019 CAD Contest: System-level FPGA Routing with Timing Division Multiplexing Technique

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942051 ◽

2019 ◽

Author(s):

Yu-Hsuan Su ◽

Richard Sun ◽

Pei-Hsin Ho

Keyword(s):

System Level

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Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942048 ◽

2019 ◽

Cited By ~ 1

Author(s):

Qijing Huang ◽

Christopher Yarp ◽

Sagar Karandikar ◽

Nathan Pemberton ◽

Benjamin Brock ◽

...

Keyword(s):

Full System ◽

Fpga Acceleration

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Endurance Enhancement of Multi-Level Cell Phase Change Memory

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD) ◽

10.1109/iccad45719.2019.8942175 ◽

2019 ◽

Author(s):

Cheongwon Lee ◽

Youngsoo Song ◽

Youngsoo Shin

Keyword(s):

Phase Change ◽

Phase Change Memory ◽

Multi Level ◽

Change Memory

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2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Active Fences against Voltage-based Side Channels in Multi-Tenant FPGAs

GenUnlock: An Automated Genetic Algorithm Framework for Unlocking Logic Encryption

SCRIP: Secure Random Clock Execution on Soft Processor Systems to Mitigate Power-based Side Channel Attacks

The Role of Multiplicative Complexity in Compiling Low $T$-count Oracle Circuits

elfPlace: Electrostatics-based Placement for Large-Scale Heterogeneous FPGAs

SFLL-HLS: Stripped-Functionality Logic Locking Meets High-Level Synthesis

Corporate Sponsor of the Technical Program Committee Dinner

2019 CAD Contest: System-level FPGA Routing with Timing Division Multiplexing Technique

Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration

Endurance Enhancement of Multi-Level Cell Phase Change Memory

2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD)
Latest Publications