Embedded thermoelectric coolers for semiconductor hot spot cooling

2006 ◽  
Author(s):  
D. Koester ◽  
R. Venkatasubramanian ◽  
B. Conner ◽  
G.J. Snyder
Keyword(s):  
Hot Spot ◽  
Thermoelectric Coolers ◽  
Spot Cooling

Mini-Contact Enhanced Thermoelectric Coolers for On-Chip Hot Spot Cooling

2009 ◽  
Vol 30 (9) ◽  
pp. 736-743 ◽  
Author(s):  
Peng Wang ◽  
Bao Yang ◽  
Avram Bar-Cohen
Keyword(s):  
Hot Spot ◽  
Thermoelectric Coolers ◽  
Spot Cooling ◽  
On Chip

Thermoelectric Coolers for Hotspot Thermal Management of 3D Stacked Chips

2011 ◽  
Author(s):  
Matthew Redmond ◽  
Kavin Manickaraj ◽  
Owen Sullivan ◽  
Satish Kumar
Keyword(s):  
Integrated Circuits ◽  
Thermal Management ◽  
Power Density ◽  
Hot Spot ◽  
Thermal Contact ◽  
Three Dimensional ◽  
Heat Removal ◽  
Thermoelectric Coolers ◽  
Vertical Coupling ◽  
Spot Cooling

Three dimensional (3D) technologies with stacked chips have the potential to provide new chip architecture, improved device density, performance, efficiency, and bandwidth. Their increased power density also can become a daunting challenge for heat removal. Furthermore, power density can be highly non-uniform leading to time and space varying hotspots which can severely affect performance and reliability of the integrated circuits. Thus, it is important to mitigate thermal gradients on chip while considering the associated cooling costs. One method of thermal management currently under investigation is the use of superlattice thermoelectric coolers (TECs) which can be employed for on demand and localized cooling. In this paper, a detailed 3D thermal model of a stacked electronic package with two dies and four ultrathin integrated TECs is studied in order to investigate the efficacy of TECs in hot spot cooling for a 3D technology. We observe up to 14.6 °C of cooling at a hot spot inside the package by TECs. A strong vertical coupling has been observed between the TECs located in top and bottom dies. Bottom TECs can detrimentally heat the top hotspots in both steady state and transient operation. TECs need to be carefully placed inside the package to avoid such undesired heating. Thermal contact resistances between dies, inside the TEC module, and between the TEC and heat spreader are shown to have a crucial effect on TEC performance inside the package. We observed that square root current pulse can provide very efficient short-duration transient cooling at hotspots.

Enhanced Thermoelectric Cooler for On-Chip Hot Spot Cooling

2007 ◽  
Author(s):  
Peng Wang ◽  
Avram Bar-Cohen ◽  
Bao Yang
Keyword(s):  
Hot Spot ◽  
Heat Fluxes ◽  
Operating Conditions ◽  
Optimum Operating ◽  
Cooling Power ◽  
Thermoelectric Cooler ◽  
Thermoelectric Coolers ◽  
Cooling Performance ◽  
Spot Cooling ◽  
On Chip

Due to shrinking feature size and increasing transistor density, combined with the performance demanded from next-generation microprocessors, on-chip hot spots, with their associated high heat fluxes and sharp temperature gradients, have emerged as the primary driver for thermal management of today’s IC technology. This paper describes the novel use of thermoelectric coolers for on-chip hot spot cooling through the use of a copper mini-contact pad, which connects the thermoelectric cooler and the silicon chip thus concentrating the thermoelectric cooling power. A package-level numerical simulation is developed to predict the local on-chip hot spot cooling performance which can be achieved with such mini-contacts. Attention is focused on the hot spot temperature reduction associated with variations in mini-contact size and the thermoelectric element thickness, as well as the parasitic effect of the thermal contact resistance introduced by the mini-contact enhanced TEC. This numerical model and simulation results are validated by comparison to spot cooling experiments with a uniformly heated chip serving as the test vehicle. The experimental results demonstrate that a copper mini-contact pad can improve spot cooling performance by 80 ∼ 115% on a 500μm thick silicon chip under optimum operating conditions and that larger power dissipation on the chip leads to better spot cooling performance.

Hot Spot Cooling and Harvesting CPU Waste Heat Using Thermoelectric Modules

2014 ◽  
Author(s):  
Soochan Lee ◽  
Patrick E. Phelan ◽  
Carole-Jean Wu
Keyword(s):  
Energy Consumption ◽  
Hot Spots ◽  
Waste Heat ◽  
Hot Spot ◽  
Heat Energy ◽  
High Heat Flux ◽  
Air Cooling ◽  
Thermoelectric Coolers ◽  
Thermoelectric Modules ◽  
Spot Cooling

The increasing integration of high performance processors and dense circuits in current computing devices has produced high heat flux in localized areas (hot spots) that limits their performance and reliability. To control the hot spots on a CPU, many researchers have focused on active cooling methods such as thermoelectric coolers (TECs) to avoid thermal emergencies. This paper presents the optimized thermoelectric modules on top of the CPU combined with a conventional air-cooling device to reduce the hot spot temperature and at the same time harvest waste heat energy generated by the CPU. To control the temperature of the hot spots, we attach small-sized TECs to the CPU and use thermoelectric generators (TEGs) placed on the rest of the CPU to convert waste heat energy into electricity. This study investigates design alternatives with an analytical model considering the non-uniform temperature distribution based on two-node thermal networks. The results indicate that we are able to attain more energy from the TEGs than energy consumption for running the TECs. In other words, we can allow the harvested heat energy to be reused to power other components and reduce hot spots simultaneously. Overall, the idea of simultaneous hot spot cooling and waste heat harvesting using thermoelectric modules on a CPU is a promising method to control the problem of heat generation and to reduce energy consumption in a computing device.

Investigation of On-Chip Hot Spot Cooling Using Microchannel Heat Sink

2013 ◽  
Vol 455 ◽  
pp. 466-469
Author(s):  
Yun Chuan Wu ◽  
Shang Long Xu ◽  
Chao Wang
Keyword(s):  
Heat Flux ◽  
Heat Sink ◽  
Hot Spots ◽  
Hot Spot ◽  
High Heat ◽  
High Heat Flux ◽  
Microchannel Heat Sink ◽  
Three Dimensional Model ◽  
Spot Cooling ◽  
On Chip

With the increase of performance demands, the nonuniformity of on-chip power dissipation becomes greater, causing localized high heat flux hot spots that can degrade the processor performance and reliability. In this paper, a three-dimensional model of the copper microchannel heat sink, with hot spot heating and background heating on the back, was developed and used for numerical simulation to predict the hot spot cooling performance. The hot spot is cooled by localized cross channels. The pressure drop, thermal resistance and effects of hot spot heat flux and fluid flow velocity on the cooling of on-chip hot spots, are investigated in detail.

scholarly journals Using Activated Transport in Parallel Nanowires for Energy Harvesting and Hot-Spot Cooling

2015 ◽  
Vol 3 (5) ◽  
Author(s):  
Riccardo Bosisio ◽  
Cosimo Gorini ◽  
Geneviève Fleury ◽  
Jean-Louis Pichard
Keyword(s):  
Energy Harvesting ◽  
Hot Spot ◽  
Spot Cooling
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