Reliable Many-Core System-on-Chip Design Using K-Node Fault Tolerant Graphs

Author(s):  
Zheng Wang ◽  
Alessandro Littarru ◽  
Emmanuel Ikechukwu Ugwu ◽  
Shazia Kanwal ◽  
Anupam Chattopadhyay
2015 ◽  
Vol 39 (4-5) ◽  
pp. 302-312 ◽  
Author(s):  
M. Baklouti ◽  
Ph. Marquet ◽  
J.L. Dekeyser ◽  
M. Abid

2016 ◽  
Vol 26 (03) ◽  
pp. 1750037 ◽  
Author(s):  
Xiaofeng Zhou ◽  
Lu Liu ◽  
Zhangming Zhu

Network-on-Chip (NoC) has become a promising design methodology for the modern on-chip communication infrastructure of many-core system. To guarantee the reliability of traffic, effective fault-tolerant scheme is critical to NoC systems. In this paper, we propose a fault-tolerant deflection routing (FTDR) to address faults on links and router by redundancy technique. The proposed FTDR employs backup links and a redundant fault-tolerant unit (FTU) at router-level to sustain the traffic reliability of NoC. Experimental results show that the proposed FTDR yields an improvement of routing performance and fault-tolerant capability over the reported fault-tolerant routing schemes in average flit deflection rate, average packet latency, saturation throughput and reliability by up to 13.5%, 9.8%, 10.6% and 17.5%, respectively. The layout area and power consumption are increased merely 3.5% and 2.6%.


Author(s):  
Tan Hai ◽  
Shahnawaz Talpur ◽  
Amir Mahmood Soomro ◽  
Chen Hong Mao

2017 ◽  
Vol 54 ◽  
pp. 60-74 ◽  
Author(s):  
Alireza Monemi ◽  
Jia Wei Tang ◽  
Maurizio Palesi ◽  
Muhammad N. Marsono

2016 ◽  
Vol 43 ◽  
pp. 1-3 ◽  
Author(s):  
Mohamed Bakhouya ◽  
Masoud Daneshtalab ◽  
Maurizio Palesi ◽  
Hassan Ghasemzadeh
Keyword(s):  
On Chip ◽  

Author(s):  
Mohammed Sultan Mohammed ◽  
Ahlam Khaled Al-Dhamari ◽  
Ab Al-Hadi ab Rahman ◽  
Norlina Paraman ◽  
Ali A.M. Al-Kubati ◽  
...  

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