A 1V, 1.1mW mixed-signal hearing aid SoC in 0.13μm CMOS process

2016 ◽  
Author(s):  
Chengying Chen ◽  
Liming Chen ◽  
Jun Fan ◽  
Zenghui Yu ◽  
Jun Yang ◽  
...  
Keyword(s):  
Hearing Aid ◽  
Cmos Process ◽  
Mixed Signal

scholarly journals A Mixed-Signal Programmable Time-Division Power-On-Reset and Volume Control Circuit for High-Resolution Hearing-Aid SoC Application

2018 ◽  
Vol 2018 ◽  
pp. 1-7
Author(s):  
Chengying Chen ◽  
Liming Chen ◽  
Jun Yang
Keyword(s):  
Low Power ◽  
Control Function ◽  
Hearing Aid ◽  
Sar Adc ◽  
Volume Control ◽  
Cmos Process ◽  
Mixed Signal ◽  
Analog To Digital ◽  
Power Application ◽  
Time Division

A mixed-signal programmable Time-Division Power-On-Reset (TD-POR) circuit based on 8-bit Successive Approximation Analog-to-Digital Converter (SAR ADC) for accurate control in low-power hearing-aid System on Chip (SoC) is presented in this paper. The end-of-converter (EOC) signal of SAR ADC is used as the mode-change signal so that the circuit can detect the battery voltage and volume voltage alternately. And the TD-POR circuit also has brown-out reset (BOR) detection capability. Through digital logic circuit, the POR, BOR threshold, and delay time can be adjusted according to the system requirement. The circuit is implemented in SMIC 0.13 μm 1P8M CMOS process. The measurement results show that, in 1 V power supply, the POR, BOR, and volume control function are accomplished. The detection resolution is the best among previous work. With 120 Hz input signal and 15 kHz clock, the ADC shows that Signal to Noise plus Distortion Ratio (SNDR) is 46.5 dB and Effective Number Of Bits (ENOB) is 7.43 bits. Total circuit power consumption is only 86 μw for low-power application.

Commercially developed mixed-signal CMOS process features for application in advanced ROICs in 0.18μm technology node

2012 ◽  
Author(s):  
Arjun Kar-Roy ◽  
Paul Hurwitz ◽  
Richard Mann ◽  
Yasir Qamar ◽  
Samir Chaudhry ◽  
...  
Keyword(s):  
Cmos Process ◽  
Mixed Signal ◽  
Technology Node

A 3.2 mW Mixed-Signal Readout Circuit for an Organic Vertical Nano-Junctions Sensor

2016 ◽  
Author(s):  
Paul C.-P. Chao ◽  
Chin-I Su ◽  
Trong-Hieu Tran ◽  
Hsiao-Wen Zan
Keyword(s):  
Simple Structure ◽  
Low Cost ◽  
Time Response ◽  
Cmos Process ◽  
Readout Circuit ◽  
Readout System ◽  
Transient Time ◽  
Mixed Signal ◽  
Ammonia Detection ◽  
Signal Readout

A new sensitivity organic vertical nano-junctions (VNJ) sensor for ammonia detection and its readout system are presented in this study. The designed ammonia sensor, VNJP3HT diode, is a simple structure with real-time response, high reproducibility and low-cost sensor. Along with the designed sensor, a precision and robust readout circuit is designed and successfully implemented as the proposed chip in this study. To utilize for a novel organic bio-chip, a particular readout system is presented that can acquire signal, compute and display concentration values of ammonia without using microcontroller. The chip is fabricated by the TSMC 0.18-μm 1P6M 3.3V mixed-signal CMOS process technique for verification. Experiment results show that the average resolution is 70.48mV/log (ppm) in a short transient time response, 50 seconds, as compared to prior study, 200 seconds. Error rate, average noise and detection rate reliability are 2.86%, 123 μVrms, and 99.6%, respectively. This chip could be suitable for application in cars, cell phones, watches, etc.

2.4 GHz ISM-Band Receiver Design in a 0.18 $\mu{\hbox{m}}$ Mixed Signal CMOS Process

2007 ◽  
Vol 17 (10) ◽  
pp. 736-738 ◽  
Author(s):  
Hee-Sauk Jhon ◽  
Ickhyun Song ◽  
In Man Kang ◽  
Hyungcheol Shin
Keyword(s):  
Cmos Process ◽  
Receiver Design ◽  
Mixed Signal ◽  
Ism Band

A Charge Amplifier Based Complementary Metal–Oxide–Semiconductor Analog Front End for Piezoelectric Microphones in Hearing Aid Devices

2019 ◽  
Vol 15 (3) ◽  
pp. 315-322
Author(s):  
Manu Chilukuri ◽  
Sungyong Jung ◽  
Hoon-Ju Chung
Keyword(s):  
Hearing Aid ◽  
Complementary Metal Oxide Semiconductor ◽  
Low Noise ◽  
Oxide Semiconductor ◽  
Cmos Process ◽  
Charge Amplifier ◽  
Front End ◽  
Analog Front End ◽  
A Charge ◽  
Cascode Current Mirror

In this paper, a low noise and low power analog front end for piezoelectric microphones used in hearing aid devices is presented. It consists of a Charge Amplifier, followed by a Variable Gain Amplifier and an Analog-to-Digital Converter. At the core of charge amplifier a two stage opamp with modified cascode current mirror is designed which achieves a gain of 93 dB and phase margin of 62°. Designed analog front end achieves an input referred noise of 0.12 μVrms and SNR of 74 dB. It consumes power of 430 μW from 1.8 V supply and occupies an area of 1.2 mm × 0.22 mm. Proposed circuit is designed and fabricated in 0.18 μm CMOS process. Designed circuit is interfaced with a sensor model of piezoelectric microphone, which mimics Ormia ochracea's auditory system, and its performance is successfully verified against simulation results.

A 1.1-V 270-μA mixed-signal hearing aid chip

2002 ◽  
Vol 37 (12) ◽  
pp. 1670-1678 ◽  
Author(s):  
D.G. Gata ◽  
W. Sjursen ◽  
J.R. Hochschild ◽  
J.W. Fattaruso ◽  
L. Fang ◽  
...  
Keyword(s):  
Hearing Aid ◽  
Mixed Signal

scholarly journals MOS capacitances used in mixed-signal circuits and their operative range

2003 ◽  
Vol 1 ◽  
pp. 295-299 ◽  
Author(s):  
W. Kraus ◽  
B. Stelzig ◽  
T. Tille ◽  
D. Schmitt-Landsiedel
Keyword(s):  
Low Voltage ◽  
Cmos Process ◽  
Mixed Signal ◽  
High Linearity ◽  
Mixed Signal Circuits ◽  
The Right ◽  
The Impact

Abstract. To avoid additional layers for high linearity capacitances in modern CMOS process families, compensated depletion mode MOS capacitances can be used. As shown in previous publications, these MOS capacitances are suitable for low voltage applications. But there exist limitations concerning the linearity of these capacitances. In this work, the impact of the nonlinearity of the capacitances on different kinds of circuits is investigated. Several examples will be discussed to show how to choose the right capacitance topology.

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