High-speed simulator including accurate MTJ models for spintronics integrated circuit design

2012 ◽  
Author(s):  
Noboru Sakimura ◽  
Ryusuke Nebashi ◽  
Yukihide Tsuji ◽  
Hiroaki Honjo ◽  
Tadahiko Sugibayashi ◽  
...  
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
High Speed ◽  
Integrated Circuit Design

scholarly journals A Compact Model of Ovonic Threshold Switch Combining Thermal Dissipation Effect

2021 ◽  
Vol 15 ◽  
Author(s):  
Shiqing Zhang ◽  
Hui Xu ◽  
Zhiwei Li ◽  
Sen Liu ◽  
Bing Song ◽  
...  
Keyword(s):  
Circuit Design ◽  
Integrated Circuit ◽  
High Speed ◽  
Thermal Dissipation ◽  
Electrical Characteristics ◽  
Integrated Circuit Design ◽  
Dissipation Effect ◽  
Leaky Integration ◽  
Threshold Switch ◽  
First Time

Ovonic threshold switch (OTS) has received great attention in neuromorphic computing due to its support for high-density synapse array as a selector and leaky-integration-firing functions Hodgkin-Huxley neurons. However, there is no simple and complete model for device simulation and integrated circuit design, which hindered application until now. In this work, we developed a compact physical model of OTS based on the Poole-Frenkel effect accompanied by the thermal dissipation effect for the first time. The thermal dissipation effect describes the energy flow between the device and the environment so that the model is more practical. Compared with previous experiments, the numerical results fairly fitted the electrical characteristics, demonstrating the model validity. In addition, the relation of the device performance with material and structure was deduced, which can facilitate optimizing the OTS device. The model will be useful for device design and implemented with high speed for simplicity.

A Case Study of Defects Due to Process-Design Interaction in Nano Scale Technology

2007 ◽  
Author(s):  
Hung-Sung Lin ◽  
Ying-Chin Hou ◽  
Juimei Fu ◽  
Mong-Sheng Wu ◽  
Vincent Huang ◽  
...  
Keyword(s):  
Liquid Crystal ◽  
Circuit Design ◽  
Process Design ◽  
Integrated Circuit ◽  
Photon Emission ◽  
Integrated Circuit Design ◽  
Nano Scale ◽  
Leakage Path ◽  
Related Defect

Abstract The difficulties in identifying the precise defect location and real leakage path is increasing as the integrated circuit design and process have become more and more complicated in nano scale technology node. Most of the defects causing chip leakage are detectable with only one of the FA (Failure Analysis) tools such as LCD (Liquid Crystal Detection) or PEM (Photon Emission Microscope). However, due to marginality of process-design interaction some defects are often not detectable with only one FA tool [1][2]. This paper present an example of an abnormal power consumption process-design interaction related defect which could only be detected with more advanced FA tools.

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