Analysis of Failure Mechanism on Gate-Silicided and Gate-Non-Silicided, Drain/Source Silicide-blocked ESD NMOSFETs in a 65nm Bulk CMOS Technology

2006 ◽  
Author(s):  
Junjun Li ◽  
David Alvarez ◽  
Kiran Chatty ◽  
Michel Abou-khalil ◽  
Robert Gauthier ◽  
...  
Keyword(s):  
Failure Mechanism ◽  
Cmos Technology

NMOSFET ESD self-protection strategy and underlying failure mechanism in advanced 0.13-μm CMOS technology

2002 ◽  
Vol 2 (1) ◽  
pp. 2-8 ◽  
Author(s):  
A. Salman ◽  
R. Gauthier ◽  
W. Stadler ◽  
K. Esmark ◽  
M. Muhammad ◽  
...  
Keyword(s):  
Failure Mechanism ◽  
Cmos Technology ◽  
Protection Strategy ◽  
Self Protection

On the role of tin underlays for the prevention of thermal grooving in thin gold films

1986 ◽  
Vol 44 ◽  
pp. 732-733
Author(s):  
Jin Young Kim ◽  
R. E. Hummel ◽  
R. T. DeHoff
Keyword(s):  
Thin Film ◽  
Free Surface ◽  
Grain Boundary ◽  
Beneficial Effect ◽  
Failure Mechanism ◽  
Failure Mechanisms ◽  
Distinct Advantage ◽  
Gold Films ◽  
Gold Thin Film

Gold thin film metallizations in microelectronic circuits have a distinct advantage over those consisting of aluminum because they are less susceptible to electromigration. When electromigration is no longer the principal failure mechanism, other failure mechanisms caused by d.c. stressing might become important. In gold thin-film metallizations, grain boundary grooving is the principal failure mechanism.Previous studies have shown that grain boundary grooving in gold films can be prevented by an indium underlay between the substrate and gold. The beneficial effect of the In/Au composite film is mainly due to roughening of the surface of the gold films, redistribution of indium on the gold films and formation of In2O3 on the free surface and along the grain boundaries of the gold films during air annealing.

CMOS TECHNOLOGY FOR CCD VIDEO MEMORIES

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-41-C4-44
Author(s):  
G. J.T. DAVIDS ◽  
P. B. HARTOG ◽  
J. W. SLOTBOOM ◽  
G. STREUTKER ◽  
A. G. van der SIJDE ◽  
...  
Keyword(s):  
Cmos Technology

CMOS-TECHNOLOGY - STATUS, TRENDS AND APPLICATIONS

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-13-C4-22
Author(s):  
F. NEPPL ◽  
H.-J. PFLEIDERER
Keyword(s):  
Cmos Technology

CMOS TECHNOLOGY USING PLASMA NITRIDED OXIDE AS A GATE DIELECTRIC

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-421-C4-424 ◽  
Author(s):  
A. STRABONI ◽  
M. BERENGUER ◽  
B. VUILLERMOZ ◽  
P. DEBENEST ◽  
A. VERNA ◽  
...  
Keyword(s):  
Gate Dielectric ◽  
Cmos Technology
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