Sample preparation for electron beam testing with reactive ion etching

2002 ◽  
Author(s):  
T. Numajiri ◽  
S. Suzuki ◽  
T. Omata ◽  
N. Yoshida ◽  
Y. Tsujita
Keyword(s):  
Electron Beam ◽  
Sample Preparation ◽  
Reactive Ion Etching ◽  
Ion Etching

50−nm silicon structures fabricated with trilevel electron beam resist and reactive‐ion etching

1981 ◽  
Vol 39 (3) ◽  
pp. 268-270 ◽  
Author(s):  
L. D. Jackel ◽  
R. E. Howard ◽  
E. L. Hu ◽  
D. M. Tennant ◽  
P. Grabbe
Keyword(s):  
Electron Beam ◽  
Reactive Ion Etching ◽  
Ion Etching ◽  
Silicon Structures

Characterization of Reactive Ion Etching of Silicon Substrate for Backside Failure Mode Analysis

2002 ◽  
Author(s):  
Huixian Wu ◽  
James Cargo
Keyword(s):  
Sample Preparation ◽  
Mechanical Milling ◽  
Reactive Ion Etching ◽  
Mode Analysis ◽  
Silicon Sample ◽  
Final Thickness ◽  
Ion Etching ◽  
Technology Scaling ◽  
Wire Bonds ◽  
Failure Mode Analysis

Abstract With technology scaling down to sub 0.16um and metalization exceeding 7 levels, the development of reproducible backside silicon sample preparation techniques becomes increasingly important to accurately localize defects. Bulk silicon thinning is a critical step in the backside sample preparation process. This paper will discuss two different ways for silicon thinning: reactive ion etching (RIE) alone, and RIE in conjunction with mechanical milling. In addition, the characterization and optimization of the RIE process for backside silicon thinning will be discussed in this paper. We have found mechanical milling works well for many package types; however, we have had difficulty reproducibly thinning certain package types such as very small die or packages where the wire bonds are in the plane of the silicon die and are in very close proximity to the edge of the die. In these cases, we have found that reactive ion etching (RIE) can be used successfully. We have also found that for package types where mechanical milling works, the combination of mechanical milling and reactive ion etching process is a useful technique for accurately controlling the final thickness of the silicon. This technique combines the speed of mechanically milling and the advantage of RIE process to accurately control the etch rate and etch process in the final stages of thinning the silicon die.

Automated Sample Preparation of Low-k Dielectrics for FESEM

2005 ◽  
Author(s):  
R. R. Cerchiara ◽  
H. A. Cook ◽  
P. E. Fischione ◽  
J. J. Gronsky ◽  
J. M. Matesa ◽  
...  
Keyword(s):  
Sample Preparation ◽  
Ion Beam ◽  
Reactive Ion Etching ◽  
Copper Interconnects ◽  
Plasma Cleaning ◽  
Ion Etching ◽  
Ion Beam Etching ◽  
Automated Sample Preparation ◽  
Microelectronic Materials ◽  
Low K

Abstract The SiLK resins, composed of aromatic hydrocarbons, are a family of highly cross-linked thermoset polymers with isotropic dielectric properties. Patterning of SiLK for high aspect ratio copper interconnects has depended on reactive ion etching with oxygen/nitrogen gas mixtures. Reactive ion etching is therefore also accomplished with reducing plasmas such as nitrogen/hydrogen. An additional plasma cleaning step can be inserted after the reactive ion etching (RIE) step, so that any residual contamination is removed prior to imaging or final sputter coating. Automated sample preparation of microelectronic materials containing high and low-k dielectrics for FESEM is accomplished in this article by combining these techniques: plasma cleaning, ion beam etching, and reactive ion etching. A single RIE chemistry was effective in etching both dielectrics as well as delineating the other phases present.

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