Characterization of Reactive Ion Etching of Silicon Substrate for Backside Failure Mode Analysis

Author(s):  
Huixian Wu ◽  
James Cargo

Abstract With technology scaling down to sub 0.16um and metalization exceeding 7 levels, the development of reproducible backside silicon sample preparation techniques becomes increasingly important to accurately localize defects. Bulk silicon thinning is a critical step in the backside sample preparation process. This paper will discuss two different ways for silicon thinning: reactive ion etching (RIE) alone, and RIE in conjunction with mechanical milling. In addition, the characterization and optimization of the RIE process for backside silicon thinning will be discussed in this paper. We have found mechanical milling works well for many package types; however, we have had difficulty reproducibly thinning certain package types such as very small die or packages where the wire bonds are in the plane of the silicon die and are in very close proximity to the edge of the die. In these cases, we have found that reactive ion etching (RIE) can be used successfully. We have also found that for package types where mechanical milling works, the combination of mechanical milling and reactive ion etching process is a useful technique for accurately controlling the final thickness of the silicon. This technique combines the speed of mechanically milling and the advantage of RIE process to accurately control the etch rate and etch process in the final stages of thinning the silicon die.

Author(s):  
R. R. Cerchiara ◽  
H. A. Cook ◽  
P. E. Fischione ◽  
J. J. Gronsky ◽  
J. M. Matesa ◽  
...  

Abstract The SiLK resins, composed of aromatic hydrocarbons, are a family of highly cross-linked thermoset polymers with isotropic dielectric properties. Patterning of SiLK for high aspect ratio copper interconnects has depended on reactive ion etching with oxygen/nitrogen gas mixtures. Reactive ion etching is therefore also accomplished with reducing plasmas such as nitrogen/hydrogen. An additional plasma cleaning step can be inserted after the reactive ion etching (RIE) step, so that any residual contamination is removed prior to imaging or final sputter coating. Automated sample preparation of microelectronic materials containing high and low-k dielectrics for FESEM is accomplished in this article by combining these techniques: plasma cleaning, ion beam etching, and reactive ion etching. A single RIE chemistry was effective in etching both dielectrics as well as delineating the other phases present.


Author(s):  
Mary Elizabeth Weldy ◽  
Leslie Serrano

Abstract Challenges in sample preparation for semiconductor failure analysis are always increasing as more complex material and smaller dimensions are required to meet the needs of the semiconductor industry. These changes require the constant need for more refined procedures in all areas of sample preparation, including mechanical polish. This paper presents a newly modified technique which increases the planarity at the critical edge of the sample and results in a larger planar region of interest. The novel method combines both a blocked reactive ion etching and a standard planar polish. It has proven to be a successful delayering technique and helpful in facilitating further analysis. This method has been verified on dies, wafer pieces, and dies thinned and attached to blank silicon for support. It is useful for increasing overall planarity and particularly helpful for the extreme edge.


Author(s):  
Martin Versen ◽  
Dorina Diaconescu ◽  
Jerome Touzel

Abstract The characterization of failure modes of DRAM is often straight forward if array related hard failures with specific addresses for localization are concerned. The paper presents a case study of a bitline oriented failure mode connected to a redundancy evaluation in the DRAM periphery. The failure mode analysis and fault modeling focus both on the root-cause and on the test aspects of the problem.


1996 ◽  
Author(s):  
George F. McLane ◽  
Paul Cooke ◽  
Robert P. Moerkirk

2020 ◽  
Vol 54 (6) ◽  
pp. 672-676
Author(s):  
L. K. Markov ◽  
I. P. Smirnova ◽  
M. V. Kukushkin ◽  
A. S. Pavluchenko

1988 ◽  
Vol 24 (13) ◽  
pp. 798 ◽  
Author(s):  
T. Matsui ◽  
H. Sugimoto ◽  
T. Ohishi ◽  
H. Ogata

1989 ◽  
Vol 25 (15) ◽  
pp. 954 ◽  
Author(s):  
T. Matsui ◽  
H. Sugimoto ◽  
K. Ohtsuka ◽  
Y. Abe ◽  
H. Ogata

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