Multi chip stacking & reliability challenges using TSV-micro C4 solder interconnection for FCCSP TSV package

2011 ◽  
Author(s):  
K.Y. Au ◽  
J.D. Beleran ◽  
Y.B. Yang ◽  
Y.F. Zhang ◽  
S.L. Kriangsak ◽  
...  
Keyword(s):  
Solder Interconnection

Superior electromigration resistance of a microsized solder interconnection containing a single-Sn grain

2018 ◽  
Vol 113 (10) ◽  
pp. 103502 ◽  
Author(s):  
Wenhui Zhu ◽  
Hanjie Yang ◽  
Zhuo Chen
Keyword(s):  
Solder Interconnection

Sn58Bi Solder Interconnection for Low-Temperature Flex-on-Flex Bonding

ETRI Journal ◽  
2016 ◽  
Vol 38 (6) ◽  
pp. 1163-1171 ◽  
Author(s):  
Haksun Lee ◽  
Kwang-Seong Choi ◽  
Yong-Sung Eom ◽  
Hyun-Cheol Bae ◽  
Jin Ho Lee
Keyword(s):  
Low Temperature ◽  
Solder Interconnection

An Efficient Bump Pad Design to Mitigate the Flip Chip Package Induced Stress

2015 ◽  
Author(s):  
Mario Gonzalez ◽  
Joeri De Vos ◽  
Geert Van der Plas ◽  
Eric Beyne
Keyword(s):  
Buffer Layer ◽  
Flip Chip ◽  
Finite Element Models ◽  
Test Vehicle ◽  
Solder Interconnection ◽  
Geometric Configurations ◽  
Induced Stresses ◽  
Reliability Of Solder Joints ◽  
Stress Buffer ◽  
Time Decrease

A numerical analysis using Finite Element Models of different stress buffer configurations has been proposed for improving the reliability of solder joints and at the same time decrease the induced stresses in the back-end-of-line (BEOL). A non-underfilled Flip Chip with a silicon die size of 10×10 mm2 mounted on a FR4 board has been used as test vehicle. The die to substrate interconnection is done by using copper pillars and Sn solder with a diameter of 50 μm and a total standoff of 50 μm. The thickness of the passivation, a copper pedestal fabricated as a redistribution I/O pad and a polymeric buffer layer with different geometric configurations were used in combination to minimize the induced stresses in the BEOL and increase the flexibility of the copper pillar interconnections. It was found that a stiff layer below the copper pillar has the major contribution to reduce the stress in the BEOL, while the softer buffer layer minimizes the induced plastic strain in the solder interconnection. Fabrication of the samples with optimal configuration are under progress.

Solder Interconnection of Aluminum Foil Rear Side Metallization for Passivated Emitter and Rear Solar Cells

2018 ◽  
Author(s):  
Angela De Rose ◽  
Achim Kraft ◽  
Sophie Gledhill ◽  
Muhammad Tahir Ali ◽  
Thomas Kroyer ◽  
...  
Keyword(s):  
Solar Cells ◽  
Aluminum Foil ◽  
Rear Side ◽  
Solder Interconnection

Solder Strength Characterization Using Hot Bump Pull Testing

2011 ◽  
Vol 2011 (1) ◽  
pp. 000690-000693
Author(s):  
Kevin O’Connell ◽  
Arv Sinha
Keyword(s):  
Interface Strength ◽  
Test Method ◽  
Attractive Alternative ◽  
Ball Shear ◽  
Solder Interconnection ◽  
Attachment Strength ◽  
Strength Characterization ◽  
Effects Of Aging ◽  
Pull Testing ◽  
Solder Interface

Hot and cold solder ball pull testing has emerged as an attractive alternative to the traditional ball shear method for characterizing the attachment strength of solder interconnection. This paper describes the effects of aging with relative humidity and temperature on solder strength using hot bump pull test method. The results show high dependence of solder interface strength due to aging.

Life prediction in c-Si solar cell interconnections under in-situ thermal cycling in Kumasi in Ghana

2021 ◽  
Vol ahead-of-print (ahead-of-print) ◽  
Author(s):  
Frank Kwabena Afriyie Nyarko ◽  
G. Takyi
Keyword(s):  
Thermal Cycle ◽  
Life Prediction ◽  
Sub Saharan Africa ◽  
Temperature Cycle ◽  
Content Type ◽  
Solder Interconnection ◽  
Test Region ◽  
Pv Modules ◽  
Free Solder ◽  
Sn60pb40 Solder

Purpose A numerical study on the reliability of soldered interconnects of c-Si solar photovoltaic cells has been conducted. Design/methodology/approach A three-year data (2012–2014) from outdoor weathering of PV modules was used to generate temperature cycle profiles to serve as thermal loads and boundary conditions for the investigation of the thermo-mechanical response of the soldered interconnects when subjected to real outdoor conditions using finite element analysis (FEA) Software (Ansys. 18.2). Two types of soldered interconnections, namely, Sn60Pb40 and Sn3.8Ag0.7Cu (Pb-free), were modelled in this study. Findings Life prediction results from accumulated creep energy density damage show that the solder interconnects will achieve maximum life under the 2014 thermal cycle loading. In particular, the Sn60Pb40 solder interconnection is expected to achieve 14,153 cycles (25.85 years) whilst the Pb-free solder interconnection is expected to achieve 9,249 cycles (16.89 years). Additionally, under the test region average (TRA) thermal cycle, the Pb-free and Pb-Sn solder interconnections are expected to achieve 7,944 cycles (13.69 years) and 12,814 cycles (23.4 years), respectively. The study shows that Sn60Pb40 solder interconnections are likely to exhibit superior reliability over the Pb-free solder interconnections at the test site. Practical implications This study would be useful to electronics manufacturing industry in the search for a suitable alternative to SnPb solders and also the thermo-mechanical reliability research community and manufacturers in the design of robust PV modules. Originality/value The study has provided TRA data/results which could be used to represent the test region instead of a particular year. The study also indicates that more than six thermal cycles are required before any meaningful conclusions can be drawn. Finally, the life of the two types of solders (SnPb and Pb-free) as interconnecting materials for c-Si PV have been predicted for the test region (Kumasi in sub-Saharan Africa).

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