On the thermal stability margins of high-leakage current packaged devices

Author(s):  
Chang-chi Lee ◽  
Johannes de Groot
2018 ◽  
Vol 6 (5) ◽  
Author(s):  
Frederick Ray Gomez

The technical paper discusses the reduction of high leakage current failures of semiconductor IC (integrated circuit) packages by eliminating the ESD (electrostatic discharge) events during assembly process and ensuring the appropriate machine grounding and ESD controls.  It is imperative to reduce or ideally eliminate the leakage current failures of the device to ensure the product quality, especially as the market becomes more challenging and demanding.  After implementation of the corrective and improvement actions, high leakage current occurrence was reduced from baseline of 5784 ppm to 1567 ppm, better than the six sigma goal of 4715 ppm.


2019 ◽  
Vol 12 (1) ◽  
pp. 77 ◽  
Author(s):  
Sima Rastayesh ◽  
Sajjad Bahrebar ◽  
Frede Blaabjerg ◽  
Dao Zhou ◽  
Huai Wang ◽  
...  

This paper uses a system engineering approach based on the Failure Mode and Effect Analysis (FMEA) methodology to do risk analysis of the power conditioner of a Proton Exchange Membrane Fuel Cell (PEMFC). Critical components with high risk, common cause failures and effects are identified for the power conditioner system as one of the crucial parts of the PEMFCs used for backup power applications in the telecommunication industry. The results of this paper indicate that the highest risk corresponds to three failure modes including high leakage current due to the substrate interface of the metal oxide semiconductor field effect transistor (MOSFET), current and electrolytic evaporation of capacitor, and thereby short circuit, loss of gate control, and increased leakage current due to gate oxide of the MOSFET. The MOSFETs, capacitors, chokes, and transformers are critical components of the power stage, which should be carefully considered in the development of the design production and implementation stage. Finally, Bayesian networks (BNs) are used to identify the most critical failure causes in the MOSFET and capacitor as they are classified from the FMEA as key items based on their Risk Priority Numbers (RPNs). As a result of BNs analyses, high temperature and overvoltage are distinguished as the most crucial failure causes. Consequently, it is recommended for designers to pay more attention to the design of MOSFETs’ failure due to high leakage current owing to substrate interface, which is caused by high temperature. The results are emphasizing design improvement in the material in order to be more resistant from high temperature.


2007 ◽  
Vol 539-543 ◽  
pp. 3497-3502 ◽  
Author(s):  
J.P. Chu ◽  
C.H. Lin

Sputtered Cu films containing various insoluble substances, such as Cu(W2.3), Cu(Mo2.0), Cu(Nb0.4), Cu(C2.1) and Cu(W0.4C0.7), are examined in this study. These films are prepared by magnetron sputtering, followed by thermal annealing. The crystal structure, microstructure, SIMS depth-profiles, leakage current, and resistivity of the films are investigated. Good thermal stability of these Cu films is confirmed with focused ion beam, X-ray diffractometry, SIMS, and electrical property measurements. After annealing at 400°C, obvious drops in resistivity, to ~3.8 μ-cm, are seen for Cu(W) film, which is lower than the other films. An evaluation of the leakage current characteristic from the SiO2/Si metal-oxide-semiconductor (MOS) structure also demonstrates that Cu with dilute tungsten is more stable than the other films studied. These results further indicate that the Cu(W) film has more thermal stability than the Cu(Mo), Cu(Nb), Cu(C), Cu(WC) and pure Cu films. Therefore, the film is suitable for the future barrierless metallization.


1981 ◽  
Vol 54 (3) ◽  
pp. 257-257
Author(s):  
August M. Mantia

1999 ◽  
Vol 564 ◽  
Author(s):  
Hwa Sung Rhee ◽  
Dong Kyun Sohn ◽  
Byung Tae Ahn

AbstractA uniform epitaxial CoSi2 layer was grown on (100) Si substrate by rapid thermal annealing at 800°C in N2 ambient without capping layers from an amorphous cobalt-carbon film. The amorphous cobalt-carbon film was deposited on Si substrate by the pyrolysis of cyclopentadienyl dicarbonyl cobalt. Co(η5-C5H5)(CO)2. at 350°C. The leakage current measured on the junction, fabricated with the epitaxial CoSi2 layer and annealed at 1000°C for 30 s. was as low as that of the as-fabricated junction without silicide. indicating that epitaxial (100) CoSi2 is thermally stable at temperatures even above 1000°C and has a potential applicability to the salicide process in sub-half micron devices.


1996 ◽  
Vol 427 ◽  
Author(s):  
Yu-Jane Mei ◽  
Ting-Chang Chang ◽  
Jeng-Dong Sheu ◽  
Wen-Kuan Yeh ◽  
Fu-Ming Pan ◽  
...  

AbstractIn this work, we study the thermal stability and interaction between SiOF and Cu. Blanket SiOF films with various F concentration were deposited by PE-CVD. A dielectric constant as low as 3.2 was obtained. Copper were deposited on these SiOF and a series of post-deposition anneal were performed. Dielectric constant of SiOF was measured after deposition and again after anneal. AES and SIMS depth profile are utilized to determine the interdiffusion between Cu and SiOF under different annealing conditions. Breakdown voltage and dielectric constant were determined form C-V and I-V measurement using a MIS ( Cu/ SiOF/ p-Si) diode. This results of leakage current measurement and flat band shift measurement suggest that the fluorine in the SiOF film will retard the cu diffusion.


1989 ◽  
Vol 163 ◽  
Author(s):  
N. Honma ◽  
H. Shimizu ◽  
C. Munakata ◽  
M. Ogasawara

AbstractA focused photon beam chopped at 2 kHz scans p-n junctions in a p-type Si wafer and ac photovoltages are capacitively measured in order to inspect homogeneities of the junctions. It is found that the ac photovoltages are high not only in the junction areas but also in the field oxide regions around the junctions when the junctions are leaky. This indicates that dense positively charged traps exist at the interface between the heavily boron implanted Si substrate and the field oxide layer around the high leakage junction, and that the traps cause the increase in both the junction leakage current and the ac photovoltage.


2000 ◽  
Vol 76 (9) ◽  
pp. 1158-1160 ◽  
Author(s):  
P. Riess ◽  
M. Ceschia ◽  
A. Paccagnella ◽  
G. Ghibaudo ◽  
G. Pananakakis

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