Sputtered Ti-Cu as a superior barrier and seed layer for panel-based high-density RDL wiring structures

Author(s):  
Chandrasekharan Nair ◽  
Fabio Pieralisi ◽  
Fuhan Liu ◽  
Venky Sundaram ◽  
Uwe Muehlfeld ◽  
...  
Keyword(s):  
Author(s):  
Thierry Mourier ◽  
Mathilde Gottardi ◽  
Pierre-Emile Philip ◽  
Sophie Verrun ◽  
Gilles Romero ◽  
...  

TSV integration is a key technology allowing heterogeneous devices 3D integration. However, depending on the targeted application, various TSV sizes and integration schemes exist, all requesting very high aspect ratio. The most common integration is the Mid-process TSV for which aspect ratio is required to be higher than 10:1 whatever application. In the case of large interposers, silicon thickness has to be increased to limit the deformation of the substrate due to highly stressed devices. Same requirements are made by photonic interposers which use thick SOI substrate leading to high warpage during integration. In the opposite, imagers requires to save silicon surface thus reduce TSV size and keep out zone. Silicon thickness has to be kept in the 100 μm range leading then the aspect ratio of the TSV to increase. Recently, Hybrid bonding progresses allowed a new type of TSV to be introduced : High Density TSVs for imagers. In this application, micrometer range TSV have to be filled with a Silicon thickness reduction limited to 10 μm by grinding process control. In order to allow the metal filling of all those type of structures, we have developed a highly conformal barrier and seed layer processes using standard materials for easier integration. The process is based on the use of MOCVD TiN as a barrier. This material is deposited using TDMAT precursor which allows low temperature deposition (200 °C)[1] which extends also the polyvalence of the process toward polymer bonded integrations. The very high step coverage of this process, reported at more than 30% in 20:1 aspect ratio coupled to high resistance to copper diffusion allows as thin as 20 nm barrier thickness which appears relevant economically (for deposition and CMP) and for stress consideration, compared to the well known but thicker PVD TaN process. Considering seed layer, the eG3D process[2] was brought to a high maturity allowing it to be integrated in an applied material raider tool coupled to TSV filling reactors. This process, based on electrografting of copper has already proved a step coverage of more than 50% in 12:1 aspect ratio structures. The presented work shows that the same process requires only deposition parameters change to be able to fully cover 10×150 μm Mid-process TSV as well as 1×10 μm High density ones. The excellent step coverage of this process allowed as thin as 200 nm (for 10×120 μm TSVs) and 100 nm (for (1×10 μm ones) deposited thicknesses to ensure perfect coverage of the structures. eG3D process also has the ability to be used as a repair process for non-continuous widely used PVD Cu seed layers but also be deposited directly on the barrier material. These 2 layers were evaluated together in a 300mm TSV integration schemes of both 10×120 mid process and 1×10 μm High Density structures and qualified electrically. The paper will discuss the deposition process development leading to simultaneously allow copper filling of the very wide range of TSVs on the same process equipment and using the same chemicals. We will then present integration results as well as electrical test of TSV daisy chains of both mid and High density TSVs showing excellent yield for all TSV size and integration schemes.


2018 ◽  
Author(s):  
Rudrashish Panda ◽  
Rudranarayan Samal ◽  
Lizina Khatua ◽  
Susanta Kumar Das

2015 ◽  
Vol 25 (3) ◽  
pp. 1-4 ◽  
Author(s):  
S. Miura ◽  
Y. Yoshida ◽  
Y. Ichino ◽  
A. Tsuruta ◽  
K. Matsumoto ◽  
...  

Author(s):  
S. McKernan ◽  
C. B. Carter ◽  
D. Bour ◽  
J. R. Shealy

The growth of ternary III-V semiconductors by organo-metallic vapor phase epitaxy (OMVPE) is widely practiced. It has been generally assumed that the resulting structure is the same as that of the corresponding binary semiconductors, but with the two different cation or anion species randomly distributed on their appropriate sublattice sites. Recently several different ternary semiconductors including AlxGa1-xAs, Gaxln-1-xAs and Gaxln1-xP1-6 have been observed in ordered states. A common feature of these ordered compounds is that they contain a relatively high density of defects. This is evident in electron diffraction patterns from these materials where streaks, which are typically parallel to the growth direction, are associated with the extra reflections arising from the ordering. However, where the (Ga,ln)P epilayer is reasonably well ordered the streaking is extremely faint, and the intensity of the ordered spot at 1/2(111) is much greater than that at 1/2(111). In these cases it is possible to image relatively clearly many of the defects found in the ordered structure.


Author(s):  
L. Mulestagno ◽  
J.C. Holzer ◽  
P. Fraundorf

Due to the wealth of information, both analytical and structural that can be obtained from it TEM always has been a favorite tool for the analysis of process-induced defects in semiconductor wafers. The only major disadvantage has always been, that the volume under study in the TEM is relatively small, making it difficult to locate low density defects, and sample preparation is a somewhat lengthy procedure. This problem has been somewhat alleviated by the availability of efficient low angle milling.Using a PIPS® variable angle ion -mill, manufactured by Gatan, we have been consistently obtaining planar specimens with a high quality thin area in excess of 5 × 104 μm2 in about half an hour (milling time), which has made it possible to locate defects at lower densities, or, for defects of relatively high density, obtain information which is statistically more significant (table 1).


Author(s):  
Evelyn R. Ackerman ◽  
Gary D. Burnett

Advancements in state of the art high density Head/Disk retrieval systems has increased the demand for sophisticated failure analysis methods. From 1968 to 1974 the emphasis was on the number of tracks per inch. (TPI) ranging from 100 to 400 as summarized in Table 1. This emphasis shifted with the increase in densities to include the number of bits per inch (BPI). A bit is formed by magnetizing the Fe203 particles of the media in one direction and allowing magnetic heads to recognize specific data patterns. From 1977 to 1986 the tracks per inch increased from 470 to 1400 corresponding to an increase from 6300 to 10,800 bits per inch respectively. Due to the reduction in the bit and track sizes, build and operating environments of systems have become critical factors in media reliability.Using the Ferrofluid pattern developing technique, the scanning electron microscope can be a valuable diagnostic tool in the examination of failure sites on disks.


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