Asymmetric ECC organization in 3D-memory via spare column utilization

2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS) ◽

10.1109/dft.2015.7315128 ◽

2015 ◽

Cited By ~ 1

Author(s):

Hyunseung Han ◽

Joon-Sung Yang

Keyword(s):

3D Memory

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nZESPA: A Near-3D-Memory Zero Skipping Parallel Accelerator for CNNs

IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems ◽

10.1109/tcad.2020.3022330 ◽

2020 ◽

pp. 1-1

Author(s):

Palash Das ◽

Hemangee K. Kapoor

Keyword(s):

3D Memory

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Advances in 3D Memory and Logic Devices

Additional Conferences (Device Packaging HiTEC HiTEN & CICMT) ◽

10.4071/2010dpc-ta13 ◽

2010 ◽

Vol 2010 (DPC) ◽

pp. 000502-000538 ◽

Cited By ~ 3

Author(s):

Robert Patti

Keyword(s):

3D Integration ◽

Logic Devices ◽

3D Memory

Tezzaron is continuing to push the level of 3D integration. The latest results of a new 1-4Gb 3D DRAM will be presented along with the plans (and possibly some results) of further integration with other 3D host logic devices. Additionally, results from several other recent 3D integrations will be reviewed.

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Exploiting three-dimensional (3D) memory stacking to improve image data access efficiency for motion estimation accelerators

Signal Processing Image Communication ◽

10.1016/j.image.2010.04.002 ◽

2010 ◽

Vol 25 (5) ◽

pp. 335-344 ◽

Cited By ~ 2

Author(s):

Yiran Li ◽

Yang Liu ◽

Tong Zhang

Keyword(s):

Motion Estimation ◽

Three Dimensional ◽

Image Data ◽

Data Access ◽

3D Memory ◽

Access Efficiency

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RET for the wiring layer of a 3D memory

10.1117/12.656725 ◽

2006 ◽

Author(s):

Yung-Tin Chen ◽

Paul Poon ◽

Chris Petti ◽

Vishnu Kamat ◽

Apo Sezginer ◽

...

Keyword(s):

3D Memory

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3D memory matrix based on a composite memristor-diode crossbar for a neuromorphic processor

Microelectronic Engineering ◽

10.1016/j.mee.2018.06.008 ◽

2018 ◽

Vol 198 ◽

pp. 1-7 ◽

Cited By ~ 8

Author(s):

Alexander Pisarev ◽

Alexander Busygin ◽

Sergey Udovichenko ◽

Oleg Maevsky

Keyword(s):

3D Memory

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3D memory: etch is the new litho

Advanced Etch Technology for Nanopatterning VII ◽

10.1117/12.2297131 ◽

2018 ◽

Cited By ~ 1

Author(s):

Christopher Petti

Keyword(s):

3D Memory

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Vertical 3D Memory Technologies

10.1002/9781118760475 ◽

2014 ◽

Cited By ~ 19

Keyword(s):

3D Memory

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Status of 3D memory storage materials

10.1117/12.144068 ◽

1993 ◽

Author(s):

Gajendra D. Savant ◽

Tomasz P. Jannson ◽

Winston Ho

Keyword(s):

Memory Storage ◽

Storage Materials ◽

3D Memory

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3D memory with shared lithography steps: The memory industry's plan to “cram more components onto integrated circuits”

2014 SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S) ◽

10.1109/s3s.2014.7028196 ◽

2014 ◽

Author(s):

Deepak C. Sekar

Keyword(s):

Integrated Circuits ◽

3D Memory

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Neurocube: A Programmable Digital Neuromorphic Architecture with High-Density 3D Memory

2016 ACM/IEEE 43rd Annual International Symposium on Computer Architecture (ISCA) ◽

10.1109/isca.2016.41 ◽

2016 ◽

Cited By ~ 69

Author(s):

Duckhwan Kim ◽

Jaeha Kung ◽

Sek Chai ◽

Sudhakar Yalamanchili ◽

Saibal Mukhopadhyay

Keyword(s):

High Density ◽

Neuromorphic Architecture ◽

3D Memory

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