Dependence of hot-carrier immunity on channel length and channel width in MOSFETs with N/sub 2/O-grown gate oxides

1992 ◽  
Vol 13 (12) ◽  
pp. 651-653 ◽  
Author(s):  
G.Q. Lo ◽  
J. Ahn ◽  
D.-L. Kwong ◽  
K.K. Young
Keyword(s):  
Channel Length ◽  
Channel Width ◽  
Gate Oxides ◽  
Hot Carrier

Circuit Voltage Probe Based on Time-Integrated Measurements of Optical Emission From Leakage Current

2002 ◽  
Author(s):  
Franco Stellari ◽  
Peilin Song ◽  
James C. Tsang ◽  
Moyra K. McManus ◽  
Mark B. Ketchen
Keyword(s):  
Leakage Current ◽  
Voltage Drop ◽  
Optical Emission ◽  
Channel Length ◽  
Operating Conditions ◽  
Power Circuit ◽  
Hot Carrier ◽  
Optical Inspection ◽  
Low Threshold ◽  
Circuit Power

Abstract Hot-carrier luminescence emission is used to diagnose the cause of excess quiescence current, IDDQ, in a low power circuit implemented in CMOS 7SF technology. We found by optical inspection of the chip that the high IDDQ is related to the low threshold, Vt, device process and in particular to transistors with minimum channel length (0.18 μm). In this paper we will also show that it is possible to gain knowledge regarding the operating conditions of the IC from the analysis of optical emission due to leakage current, aside from simply locating defects and failures. In particular, we will show how it is possible to calculate the voltage drop across the circuit power grid from time-integrated acquisitions of leakage luminescence.

Hot Carrier Effects in Deep Submicron Nmosfets

1996 ◽  
Vol 428 ◽  
Author(s):  
Abhijit Phanse ◽  
Samar Saha
Keyword(s):  
Electric Fields ◽  
Channel Length ◽  
Deep Submicron ◽  
Short Channel ◽  
Hot Carrier ◽  
Velocity Saturation ◽  
Substrate Current ◽  
Hot Carrier Effects ◽  
Saturation Effects ◽  
Channel Lengths

AbstractThis paper addresses hot-carrier related reliability issues in deep submicron silicon nMOSFET devices. In order to monitor the hot-carrier induced device degradation, the substrate current was measured for devices with varying channel lengths (20 um - 0.24 um) under various biasing conditions. Deep submicron devices experience velocity saturation of channel carriers due to extremely high lateral electric fields. To evaluate the effects of velocity saturation in the channel, the pinch-off length in the channel was extracted for all the devices of the target technology. It was observed that for very short channel devices, carriers in most of the channel experience velocity saturation and almost the entire channel gets pinched off. It is shown in this paper that for very short channel devices, the pinch-off length in the channel is limited by the effective channel length, and that velocity saturation effects are critical to the transport of channel carriers.

Improved hot-carrier immunity in CMOS analog device with N/sub 2/O-nitrided gate oxides

1992 ◽  
Vol 13 (9) ◽  
pp. 457-459 ◽  
Author(s):  
G.Q. Lo ◽  
J. Ahn ◽  
D.-L. Kwong
Keyword(s):  
Analog Device ◽  
Gate Oxides ◽  
Hot Carrier

Performance and hot-carrier reliability of 100 nm channel length jet vapor deposited Si/sub 3/N/sub 4/ MNSFETs

2001 ◽  
Vol 48 (4) ◽  
pp. 679-684 ◽  
Author(s):  
S. Mahapatra ◽  
V.R. Rao ◽  
B. Cheng ◽  
M. Khare ◽  
C.D. Parikh ◽  
...  
Keyword(s):  
Channel Length ◽  
Hot Carrier

Investigation of hot-carrier induced degradation in 0.1μm channel length n-MOSFET's

1993 ◽  
Vol 22 (1-4) ◽  
pp. 293-296 ◽  
Author(s):  
N. Revil ◽  
J.P. Miéville ◽  
S. Cristoloveanu ◽  
M. Dutoit ◽  
P. Mortini
Keyword(s):  
Channel Length ◽  
Hot Carrier

Design and Gate Drive Considerations for Epitaxial 1.2 kV Buried Grid N-on and N-off JFETs for Operation at 250°C

2010 ◽  
Vol 645-648 ◽  
pp. 961-964 ◽  
Author(s):  
Jang Kwon Lim ◽  
Mietek Bakowski ◽  
Hans Peter Nee
Keyword(s):  
Threshold Voltage ◽  
Doping Concentration ◽  
Channel Length ◽  
Channel Width ◽  
Temperature Range ◽  
Turn On ◽  
Switching Losses ◽  
Order Of Magnitude ◽  
Gate Resistance

The 1.2 kV 4H-SiC buried-grid vertical JFET structures with Normally-on (N-on) and Normally-off (N-off) design were investigated by simulations. The conduction and switching properties were determined in the temperature range from -50°C to 250°C. In this paper, the characteristics of the N-on designs with threshold voltage (Vth) of -50 V and -10 V are compared with the N-off design (Vth=0). The presented data are for devices with the same channel length at 250°C. The results show that the on-resistance (Ron) decreases with increasing channel doping concentration and decreasing channel width. The presented turn-on, Eon, and turn-off, Eoff, energies per pulse are calculated under the switching conditions 100 A/cm2 and 600 V with a gate resistance of Rg=1 . For the two N-on designs the total switching losses, Esw=Eon+Eoff, differ less than 30% with Wch 0.7 m. With Wch=0.5 m the switching losses of N-off design are almost one order of magnitude higher than those of the N-on design with Vth = -50 V.

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