Soft breakdown of ultra-thin gate oxide layers

1996 ◽  
Vol 43 (9) ◽  
pp. 1499-1504 ◽  
Author(s):  
M. Depas ◽  
T. Nigam ◽  
M.M. Heyns
Keyword(s):  
Gate Oxide ◽  
Oxide Layers ◽  
Thin Gate Oxide ◽  
Soft Breakdown

Modeling Soft Breakdown of Ultra-Thin Gate Oxide Layers

1999 ◽  
Vol 567 ◽  
Author(s):  
Michel Houssa ◽  
P.W. Mertens ◽  
M.M. Heyns
Keyword(s):  
Gate Voltage ◽  
Dielectric Breakdown ◽  
Percolation Cluster ◽  
Gate Oxide ◽  
Oxide Layers ◽  
Long Range Correlations ◽  
Electrical Stress ◽  
Non Gaussian ◽  
Thin Gate Oxide ◽  
Soft Breakdown

ABSTRACTThe time-dependent dielectric breakdown of MOS capacitors with ultra-thin gate oxide layers is investigated. After the occurrence of soft breakdown, the gate current increases by 3 to 4 orders of magnitudes and behaves like a power law of the applied gate voltage. It is shown that this behavior can be explained by assuming that a percolation path is formed between the electron traps generated in the gate oxide layer during electrical stress of the capacitors. The time dependence of the gate voltage signal after soft breakdown is next analysed. It is shown that the fluctuations in the gate voltage are non-gaussian as well as that long-range correlations exist in the system after soft breakdown. These results can be explained by a dynamic percolation model, taking into account the trapping-detrapping of charges within the percolation cluster formed at soft breakdown.

Triggering and Suppression of Soft Breakdown During Mercury-Probe Assessment of Thin Gate Oxide Quality

1999 ◽  
Vol 567 ◽  
Author(s):  
S. Evseev ◽  
A. Cacciato
Keyword(s):  
Gate Oxide ◽  
Oxide Thickness ◽  
Oxide Layers ◽  
Current Stress ◽  
Thin Gate Oxide ◽  
Soft Breakdown ◽  
Microelectronic Manufacturing ◽  
Routine Assessment ◽  
Probe Measurements ◽  
Gate Oxide Integrity

ABSTRACTThe breakdown of ultra-thin gate oxide layers is investigated using fast-feedback Hg-probe measurements to perform Exponentially Ramped Current Stress (ERCS) tests. Several parameters have been varied in the ERCS test: oxide thickness (4nm, 5nm, 6nm and 7nm), capacitor area (0.12cm2 and 0.023cm2) and initial injected current (5×10−5 A and 5×10−4 A). Soft breakdown is detected only in case of oxides thinner than 5 nm. It is found that the fraction of points on the wafer on which soft breakdown occurs reduces by increasing the value of the injected current at the beginning of the ERCS test or completely disappears by decreasing the capacitor area. Consequences of current results for correct routine assessment of gate oxide integrity in microelectronic manufacturing are discussed.

scholarly journals Conduction mechanism of ultra-thin gate oxide n-MOSFET after soft breakdown

2005 ◽  
Vol 54 (8) ◽  
pp. 3884
Author(s):  
Wang Yan-Gang ◽  
Xu Ming-Zhen ◽  
Tan Chang-Hua ◽  
Duan Xiao-Rong
Keyword(s):  
Conduction Mechanism ◽  
Gate Oxide ◽  
Thin Gate Oxide ◽  
Soft Breakdown

Post-Soft-Breakdown Characteristics of Deep Sub-Micron NMOSFETs with Ultra-Thin Gate Oxide

2001 ◽  
Author(s):  
Da-Yuan Lee ◽  
Horng-Chih Lin ◽  
Min-Yu Tsai ◽  
Tiao-Yuan Huang ◽  
T. Wang
Keyword(s):  
Gate Oxide ◽  
Thin Gate Oxide ◽  
Soft Breakdown

Voltage Acceleration of Ultra-Thin Gate Oxide Degradation before and after Soft Breakdown

2002 ◽  
Author(s):  
Takuji Hosoi ◽  
Shigeyasu Uno ◽  
Yoshinari Kamakura ◽  
Kenji Taniguchi
Keyword(s):  
Gate Oxide ◽  
Oxide Degradation ◽  
Before And After ◽  
Thin Gate Oxide ◽  
Soft Breakdown
Sign in / Sign up

Export Citation Format

Share Document