scholarly journals Room-temperature detection of spin accumulation in silicon across Schottky tunnel barriers using a metal–oxide–semiconductor field effect transistor structure (invited)

2013 ◽  
Vol 113 (17) ◽  
pp. 17C501 ◽  
Author(s):  
K. Hamaya ◽  
Y. Ando ◽  
K. Masaki ◽  
Y. Maeda ◽  
Y. Fujita ◽  
...  
1991 ◽  
Vol 69 (3-4) ◽  
pp. 174-176 ◽  
Author(s):  
Ian W. Wylie ◽  
N. Garry Tarr

A new lightly doped drain (LDD) metal oxide semiconductor field effect transistor structure is presented that provides substantial overlap of the gate over the n− region independent of the n− junction depth. This structure uses polysilicon spacers to replace the oxide sidewall spacers used in a conventional LDD device. The structure has been given the acronym "AGAIN," for added gate after implantation of n−.


Materials ◽  
2021 ◽  
Vol 14 (13) ◽  
pp. 3554
Author(s):  
Jaeyeop Na ◽  
Jinhee Cheon ◽  
Kwangsoo Kim

In this paper, a novel 4H-SiC split heterojunction gate double trench metal-oxide-semiconductor field-effect transistor (SHG-DTMOS) is proposed to improve switching speed and loss. The device modifies the split gate double trench MOSFET (SG-DTMOS) by changing the N+ polysilicon split gate to the P+ polysilicon split gate. It has two separate P+ shielding regions under the gate to use the P+ split polysilicon gate as a heterojunction body diode and prevent reverse leakage `current. The static and most dynamic characteristics of the SHG-DTMOS are almost like those of the SG-DTMOS. However, the reverse recovery charge is improved by 65.83% and 73.45%, and the switching loss is improved by 54.84% and 44.98%, respectively, compared with the conventional double trench MOSFET (Con-DTMOS) and SG-DTMOS owing to the heterojunction.


Sign in / Sign up

Export Citation Format

Share Document