An analytical moderate inversion drain current model for polycrystalline silicon thin‐film transistors considering deep and tail states in the grain boundary

1996 ◽  
Vol 79 (4) ◽  
pp. 1961-1967 ◽  
Author(s):  
S. S. Chen ◽  
J. B. Kuo
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Current Model ◽  
Drain Current ◽  
Silicon Thin Film ◽  
Moderate Inversion

Surface-Potential-Based Drain Current Model for Polycrystalline Silicon Thin-Film Transistors

2008 ◽  
Vol 47 (10) ◽  
pp. 7798-7802 ◽  
Author(s):  
Hiroshi Tsuji ◽  
Tsuyoshi Kuzuoka ◽  
Yuji Kishida ◽  
Yoshiyuki Shimizu ◽  
Masaharu Kirihara ◽  
...  
Keyword(s):  
Thin Film ◽  
Surface Potential ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Current Model ◽  
Drain Current ◽  
Silicon Thin Film

Grain Boundary Characterisation in Sequentially Laterally Solidified Polycrystalline-Silicon Thin Film Transistors

2019 ◽  
Vol 8 (1) ◽  
pp. 211-216
Author(s):  
Antonio Valletta ◽  
Alessandra Bonfiglietti ◽  
Matteo Rapisarda ◽  
Alessandro Pecora ◽  
Luigi Mariucci ◽  
...  
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Silicon Thin Film

Direct observation of grain boundary effects in polycrystalline silicon thin‐film transistors

1982 ◽  
Vol 40 (7) ◽  
pp. 598-600 ◽  
Author(s):  
H. J. Leamy ◽  
R. C. Frye ◽  
K. K. Ng ◽  
G. K. Celler ◽  
E. I. Povilonis ◽  
...  
Keyword(s):  
Thin Film ◽  
Grain Boundary ◽  
Direct Observation ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Boundary Effects ◽  
Silicon Thin Film ◽  
Grain Boundary Effects

P-channel Polycrystalline Silicon Thin Film Transistors on Steel Foil Substrates

2001 ◽  
Vol 664 ◽  
Author(s):  
Ming Wu ◽  
Sigurd Wagner
Keyword(s):  
Thin Film ◽  
Thin Film Transistors ◽  
Polycrystalline Silicon ◽  
Field Effect ◽  
Drain Current ◽  
Silicon Thin Film ◽  
Polysilicon Films ◽  
Source Voltage ◽  
Steel Substrates ◽  
Hydrogenated Amorphous

ABSTRACTWe fabricated self-aligned polycrystalline silicon (polysilicon) thin film transistors on flexible steel substrates. The polysilicon was formed by furnace crystallization of hydrogenated amorphous silicon at 950°C/20sec or 750°C/2min. The TFTs made from these polysilicon films have hole field effect mobilities in the linear regime of 22 cm2·V−1s−1 (950°C) and 14 cm2·V−1s−1 (750°C). The OFF current at 10 V drain-source voltage is 10−10A and the drain current ON/OFF ratio is ∼106.

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