Analytical Drain Current Model for Poly-Si Thin-Film Transistors Biased in Strong Inversion Considering Degradation of Tail States at Grain Boundary

2013 ◽  
Vol 60 (3) ◽  
pp. 1122-1127
Author(s):  
Lisa L. Wang ◽  
James B. Kuo ◽  
Shengdong Zhang
2013 ◽  
Vol 114 (18) ◽  
pp. 184502 ◽  
Author(s):  
A. Tsormpatzoglou ◽  
N. A. Hastas ◽  
N. Choi ◽  
F. Mahmoudabadi ◽  
M. K. Hatalis ◽  
...  

Electronics ◽  
2020 ◽  
Vol 9 (6) ◽  
pp. 1016
Author(s):  
Silvestre Salas-Rodríguez ◽  
Francisco López-Huerta ◽  
Agustín L. Herrera-May ◽  
Joel Molina-Reyes ◽  
Jaime Martínez-Castillo

Thin film transistors (TFTs) fabricated on flexible and large area substrates have been studied with great interest due to their future applications. Recent studies have developed new semiconductors such as a-SiGe:H for fabrication of high performance TFTs. These films have important advantages, including deposition at low temperatures and low pressures, and higher carrier mobilities. Due to these advantages, the a-SiGe:H films can be used in the fabrication of TFTs. In this work, we present an analytical drain current model for a-SiGe:H TFTs considering density of states and free charges, which describes the current behavior at sub-and above- threshold region. In addition, 2D numerical simulations of a-SiGe:H TFTs are developed. The results of the analytical drain current model agree well with those of the 2D numerical simulations. For all characteristics of the drain current curves, the average absolute error of the analytical model is close to 5.3%. This analytical drain current model can be useful to estimate the performance of a-SiGe:H TFTs for applications in large area electronics.


2008 ◽  
Vol 47 (10) ◽  
pp. 7798-7802 ◽  
Author(s):  
Hiroshi Tsuji ◽  
Tsuyoshi Kuzuoka ◽  
Yuji Kishida ◽  
Yoshiyuki Shimizu ◽  
Masaharu Kirihara ◽  
...  

Sign in / Sign up

Export Citation Format

Share Document