New model for the thickness and mismatch dependencies of threading dislocation densities in mismatched heteroepitaxial layers

J. E. Ayers

doi:10.1063/1.359952

A Novel Approach for the Complete Removal of Threading Dislocations from Mismatched Heteroepitaxial Layers

MRS Proceedings ◽

10.1557/proc-652-y8.8 ◽

2000 ◽

Vol 652 ◽

Author(s):

X. G. Zhang ◽

A. Rodriguez ◽

P. Li ◽

F. C. Jain ◽

J. E. Ayers

Keyword(s):

Thermal Annealing ◽

Annealing Temperature ◽

Complete Removal ◽

Threading Dislocation ◽

Threading Dislocations ◽

Material System ◽

Novel Approach ◽

Dislocation Densities ◽

Microscopic Evaluation ◽

Heteroepitaxial Layers

ABSTRACTThe application of mismatched combinations of heteroepitaxial semiconductors has been quite limited due to the presence of high threading dislocation densities. In recent years, great progress has been made toward solving this problem using compliant substrates and lateral epitaxial overgrowth. We have proposed another approach which we call patterned heteroepitaxial processing (PHP), and which involves post-growth patterning and thermal annealing. In this paper we describe the successful application of the PHP technique to the ZnSe/GaAs (001) material system.Epitaxial layers of ZnSe on GaAs (001) were grown to thicknesses of 2000 - 6000 Å by photoassisted metalorganic vapor phase epitaxy (MOVPE). Following growth, layers were patterned by photolithography and then annealed at elevated temperature under flowing hydrogen. Threading dislocation densities were determined using a bromine/methanol etch followed by microscopic evaluation of the resulting etch pit densities.We found that as-grown layers contained more than 107 cm-2 threading dislocations. The complete removal of threading dislocations was accomplished by patterning to 70 μm by 70 μm square regions followed by thermal annealing for 30 minutes at temperatures greater than 500°C. Neither post-growth annealing alone nor post-growth patterning alone had a significant effect. By studying the annealing temperature dependence, we have determined that the dislocation removal by PHP is thermally activated. It appears that the maximum dimension for patterned regions in PHP is determined by the annealing temperature rather than an effective range for image forces.These results show that PHP can be used to completely remove threading dislocations from lattice-relaxed heteroepitaxial layers. In principle this approach should be generally applicable to mismatched heteroepitaxial materials.

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Threading Dislocation Densities in Mismatched Heteroepitaxial (001) Semiconductors

MRS Proceedings ◽

10.1557/proc-209-661 ◽

1990 ◽

Vol 209 ◽

Cited By ~ 7

Author(s):

J. E. Ayers ◽

S.K. Ghandhi ◽

L. J. Schowalter

Keyword(s):

Dislocation Density ◽

Film Thickness ◽

Thickness Dependence ◽

Threading Dislocation ◽

Gaas On Si ◽

Dislocation Densities ◽

Threading Dislocation Density ◽

Heteroepitaxial Layers ◽

Equilibrium Strain ◽

Good Agreement

ABSTRACTIn this paper we propose a theory which accounts for the thickness dependence of threading dislocation densities in mismatched heteroepitaxial (001) semiconductors. This theory predicts that, for thick, planar, highly-mismatched heteroepitaxial layers with equilibrium strain, the threading dislocation density should be proportional to f/h, where f is thelattice mismatch and h is the film thickness. These predictions are in good agreement with experimental resultsin the GaAs on Si(001) system.

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Relaxation Mechanism of the Defect-Free 3C-SiC Epitaxial Films Grown on Step-Free 4H SiC Mesas

Materials Science Forum ◽

10.4028/www.scientific.net/msf.527-529.279 ◽

2006 ◽

Vol 527-529 ◽

pp. 279-282 ◽

Cited By ~ 4

Author(s):

H. Du ◽

Marek Skowronski ◽

Philip G. Neudeck ◽

Andrew J. Trunek ◽

David J. Spry ◽

...

Keyword(s):

Relaxation Mechanism ◽

Threading Dislocation ◽

Misfit Dislocations ◽

Extended Defects ◽

Cross Sectional ◽

Transmission Electron ◽

Dislocation Densities ◽

Atomically Flat ◽

Heteroepitaxial Layers ◽

Koh Etching

Cross-sectional transmission electron microscopy (TEM) was used to investigate the extended defects in 3C-SiC films deposited on atomically flat 4H-SiC mesas. The nominal layer thickness was 10 μm and was considerably larger than the critical thickness determined by either the Matthews and Blakeslee or People and Bean models. Threading dislocation densities determined by KOH etching are far below densities typical of relaxed heteroepitaxial layers, down to as low as 104cm-2 densities found in 4H-SiC. Misfit dislocations with Burgers vectors of <11 2 0> were observed in planes parallel to the 3C/4H SiC interface. These defects were interpreted as due to nucleation of dislocation half loops at mesa edges and glide along the 3C/4H interface.

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Defect-Engineered Graded GexSi1-x Buffers on Si (001) with Extreme Low Threading Dislocation Density

MRS Proceedings ◽

10.1557/proc-378-141 ◽

1995 ◽

Vol 378 ◽

Cited By ~ 2

Author(s):

G. Kissinger ◽

T. Morgenstern ◽

G. Morgenstern ◽

H. B. Erzgräber ◽

H. Richter

Keyword(s):

Electron Microscopy ◽

Transmission Electron Microscopy ◽

Atomic Force Microscopy ◽

Dislocation Density ◽

Threading Dislocation ◽

Force Microscopy ◽

Atomic Force ◽

Transmission Electron ◽

Dislocation Densities ◽

Threading Dislocation Density

AbstractStepwise equilibrated graded GexSii-x (x≤0.2) buffers with threading dislocation densities between 102 and 103 cm−2 on the whole area of 4 inch silicon wafers were grown and studied by transmission electron microscopy, defect etching, atomic force microscopy and photoluminescence spectroscopy.

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Totally relaxed GexSi1−xlayers with low threading dislocation densities grown on Si substrates

Applied Physics Letters ◽

10.1063/1.105351 ◽

1991 ◽

Vol 59 (7) ◽

pp. 811-813 ◽

Cited By ~ 597

Author(s):

E. A. Fitzgerald ◽

Y.‐H. Xie ◽

M. L. Green ◽

D. Brasen ◽

A. R. Kortan ◽

...

Keyword(s):

Threading Dislocation ◽

Si Substrates ◽

Dislocation Densities

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High Quality AlN Layer Grown on Patterned Sapphire Substrates by Hydride Vapor-Phase Epitaxy: A Route for Cost Efficient AlN Templates for Deep Ultraviolet Light Devices

Journal of Nanoscience and Nanotechnology ◽

10.1166/jnn.2021.19258 ◽

2021 ◽

Vol 21 (9) ◽

pp. 4881-4885

Author(s):

Seung-Jae Lee ◽

Seong-Ran Jeon ◽

Young Ho Song ◽

Young-Jun Choi ◽

Hae-Gon Oh ◽

...

Keyword(s):

Vapor Phase ◽

Vapor Phase Epitaxy ◽

Hydride Vapor Phase Epitaxy ◽

Threading Dislocation ◽

Sapphire Substrates ◽

Transmission Electron ◽

Dislocation Densities ◽

Order Of Magnitude ◽

Cost Efficient ◽

Patterned Sapphire Substrates

We report the characteristics of AlN epilayers grown directly on cylindrical-patterned sapphire substrates (CPSS) by hydride vapor-phase epitaxy (HVPE). To evaluate the effect of CPSS, we analyzed the threading dislocation densities (TDDs) of AlN films grown simultaneously on CPSS and flat sapphire substrate (FSS) by transmission electron microscopy (TEM). The corresponding TDD is measured to be 5.69 x 108 cm−2 for the AlN sample grown on the CPSS that is almost an order of magnitude lower than the value of 3.43 × 109 cm−2 on the FSS. The CPSS contributes to reduce the TDs originated from the AlN/sapphire interface via bending the TDs by lateral growth during the coalescence process. In addition, the reduction of direct interface area between AlN and sapphire by CPSS reduce the generation of TDs.

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Evaluation of threading dislocation densities in In- and N-face InN

Journal of Applied Physics ◽

10.1063/1.3319557 ◽

2010 ◽

Vol 107 (5) ◽

pp. 053517 ◽

Cited By ~ 51

Author(s):

C. S. Gallinat ◽

G. Koblmüller ◽

Feng Wu ◽

J. S. Speck

Keyword(s):

Threading Dislocation ◽

Dislocation Densities

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Relaxed Ge0.9Si0.1 alloy layers with low threading dislocation densities grown on low-temperature Si buffers

Applied Physics Letters ◽

10.1063/1.121579 ◽

1998 ◽

Vol 72 (24) ◽

pp. 3160-3162 ◽

Cited By ~ 58

Author(s):

C. S. Peng ◽

Z. Y. Zhao ◽

H. Chen ◽

J. H. Li ◽

Y. K. Li ◽

...

Keyword(s):

Low Temperature ◽

Threading Dislocation ◽

Dislocation Densities

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High Voltage AlGaN/GaN Heterojunction Transistors

International Journal of High Speed Electronics and Systems ◽

10.1142/s0129156404002314 ◽

2004 ◽

Vol 14 (01) ◽

pp. 225-243 ◽

Cited By ~ 3

Author(s):

L. S. McCarthy ◽

N-Q. Zhang ◽

H. Xing ◽

B. Moran ◽

S. DenBaars ◽

...

Keyword(s):

Drain Current ◽

Gate Insulator ◽

Threading Dislocation ◽

High Electron ◽

Resistive Load ◽

Power Switching ◽

Field Plate ◽

Switching Power ◽

Dislocation Densities ◽

Extrinsic Base

The use of AlGaN / GaN HEMTs and HBTs for switching power supplies is explored. With its high electron velocities and breakdown fields, GaN has great potential for power switching. The field-plate HEMT increased breakdown voltages by 20% to 570V by reducing the peak field at the drain-side edge of the gate. The use of a gate insulator is also investigated, using both JVD SiO 2 and e-beam evaporated SiO 2 to reduce gate leakage, increasing breakdown voltages to 1050V and 1300V respectively. The power device figure of merit (FOM) for these devices: [Formula: see text], is the highest reported for switching devices. To reduce trapping effects, reactively sputtered SiN x, is used as a passivant, resulting in a switching time of less than 30 ns for devices blocking over 110V with a drain current of 1.4A under resistive load conditions. Dynamic load results are also presented. The development of HBTs for switching applications included the development of an etched emitter HBT with a selectively regrown extrinsic base. This was later improved upon with the selectively regrown emitter devices with current gains as high as 15. To improve breakdown in these devices, thick GaN layers were grown, reducing threading dislocation densities in the active layers. A further improvement included the use of a bevelled shallow etch and a lateral collector design to maximize device breakdown.

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