Evaluation of threading dislocation densities in In- and N-face InN

2010 ◽  
Vol 107 (5) ◽  
pp. 053517 ◽  
Author(s):  
C. S. Gallinat ◽  
G. Koblmüller ◽  
Feng Wu ◽  
J. S. Speck
Keyword(s):  
Threading Dislocation ◽  
Dislocation Densities

Defect-Engineered Graded GexSi1-x Buffers on Si (001) with Extreme Low Threading Dislocation Density

1995 ◽  
Vol 378 ◽  
Author(s):  
G. Kissinger ◽  
T. Morgenstern ◽  
G. Morgenstern ◽  
H. B. Erzgräber ◽  
H. Richter
Keyword(s):  
Electron Microscopy ◽  
Transmission Electron Microscopy ◽  
Atomic Force Microscopy ◽  
Dislocation Density ◽  
Threading Dislocation ◽  
Force Microscopy ◽  
Atomic Force ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Threading Dislocation Density

AbstractStepwise equilibrated graded GexSii-x (x≤0.2) buffers with threading dislocation densities between 102 and 103 cm−2 on the whole area of 4 inch silicon wafers were grown and studied by transmission electron microscopy, defect etching, atomic force microscopy and photoluminescence spectroscopy.

Totally relaxed GexSi1−xlayers with low threading dislocation densities grown on Si substrates

1991 ◽  
Vol 59 (7) ◽  
pp. 811-813 ◽  
Author(s):  
E. A. Fitzgerald ◽  
Y.‐H. Xie ◽  
M. L. Green ◽  
D. Brasen ◽  
A. R. Kortan ◽  
...  
Keyword(s):  
Threading Dislocation ◽  
Si Substrates ◽  
Dislocation Densities

High Quality AlN Layer Grown on Patterned Sapphire Substrates by Hydride Vapor-Phase Epitaxy: A Route for Cost Efficient AlN Templates for Deep Ultraviolet Light Devices

2021 ◽  
Vol 21 (9) ◽  
pp. 4881-4885
Author(s):  
Seung-Jae Lee ◽  
Seong-Ran Jeon ◽  
Young Ho Song ◽  
Young-Jun Choi ◽  
Hae-Gon Oh ◽  
...  
Keyword(s):  
Vapor Phase ◽  
Vapor Phase Epitaxy ◽  
Hydride Vapor Phase Epitaxy ◽  
Threading Dislocation ◽  
Sapphire Substrates ◽  
Transmission Electron ◽  
Dislocation Densities ◽  
Order Of Magnitude ◽  
Cost Efficient ◽  
Patterned Sapphire Substrates

We report the characteristics of AlN epilayers grown directly on cylindrical-patterned sapphire substrates (CPSS) by hydride vapor-phase epitaxy (HVPE). To evaluate the effect of CPSS, we analyzed the threading dislocation densities (TDDs) of AlN films grown simultaneously on CPSS and flat sapphire substrate (FSS) by transmission electron microscopy (TEM). The corresponding TDD is measured to be 5.69 x 108 cm−2 for the AlN sample grown on the CPSS that is almost an order of magnitude lower than the value of 3.43 × 109 cm−2 on the FSS. The CPSS contributes to reduce the TDs originated from the AlN/sapphire interface via bending the TDs by lateral growth during the coalescence process. In addition, the reduction of direct interface area between AlN and sapphire by CPSS reduce the generation of TDs.

Relaxed Ge0.9Si0.1 alloy layers with low threading dislocation densities grown on low-temperature Si buffers

1998 ◽  
Vol 72 (24) ◽  
pp. 3160-3162 ◽  
Author(s):  
C. S. Peng ◽  
Z. Y. Zhao ◽  
H. Chen ◽  
J. H. Li ◽  
Y. K. Li ◽  
...  
Keyword(s):  
Low Temperature ◽  
Threading Dislocation ◽  
Dislocation Densities

High Voltage AlGaN/GaN Heterojunction Transistors

2004 ◽  
Vol 14 (01) ◽  
pp. 225-243 ◽  
Author(s):  
L. S. McCarthy ◽  
N-Q. Zhang ◽  
H. Xing ◽  
B. Moran ◽  
S. DenBaars ◽  
...  
Keyword(s):  
Drain Current ◽  
Gate Insulator ◽  
Threading Dislocation ◽  
High Electron ◽  
Resistive Load ◽  
Power Switching ◽  
Field Plate ◽  
Switching Power ◽  
Dislocation Densities ◽  
Extrinsic Base

The use of AlGaN / GaN HEMTs and HBTs for switching power supplies is explored. With its high electron velocities and breakdown fields, GaN has great potential for power switching. The field-plate HEMT increased breakdown voltages by 20% to 570V by reducing the peak field at the drain-side edge of the gate. The use of a gate insulator is also investigated, using both JVD SiO 2 and e-beam evaporated SiO 2 to reduce gate leakage, increasing breakdown voltages to 1050V and 1300V respectively. The power device figure of merit (FOM) for these devices: [Formula: see text], is the highest reported for switching devices. To reduce trapping effects, reactively sputtered SiN x, is used as a passivant, resulting in a switching time of less than 30 ns for devices blocking over 110V with a drain current of 1.4A under resistive load conditions. Dynamic load results are also presented. The development of HBTs for switching applications included the development of an etched emitter HBT with a selectively regrown extrinsic base. This was later improved upon with the selectively regrown emitter devices with current gains as high as 15. To improve breakdown in these devices, thick GaN layers were grown, reducing threading dislocation densities in the active layers. A further improvement included the use of a bevelled shallow etch and a lateral collector design to maximize device breakdown.

Reduced threading dislocation densities in high-T/N-rich grown InN films by plasma-assisted molecular beam epitaxy

2013 ◽  
Vol 102 (5) ◽  
pp. 051916 ◽  
Author(s):  
Bernhard Loitsch ◽  
Fabian Schuster ◽  
Martin Stutzmann ◽  
Gregor Koblmüller
Keyword(s):  
Molecular Beam Epitaxy ◽  
Molecular Beam ◽  
Threading Dislocation ◽  
Dislocation Densities

Residual Strain and Defect Analysis in as Grown and Annealed SiGe Layers

1991 ◽  
Vol 220 ◽  
Author(s):  
A. R. Powell ◽  
R. A. Kubiak ◽  
T. E. Whall ◽  
E. H. C. Parker ◽  
D. K. Bowen
Keyword(s):  
Residual Strain ◽  
Buffer Layers ◽  
Limited Area ◽  
Threading Dislocation ◽  
Misfit Dislocations ◽  
High Temperature Anneal ◽  
Dislocation Densities ◽  
Acceptable Quality ◽  
Strained Sige

ABSTRACTIn this paper we address the problem of producing SiGe buffer layers of acceptable quality for the growth of symmetrically strained SiGe structures. Initially we consider SiGe layers grown to well beyond the metastable critical thickness and examine the degree of residual strain both as - grown and post anneal. The defect levels in metastable SiGe layers following high temperature anneal were also studied. A buffer layer was grown consisting of stacked metastable SiGe layers each of which is annealed in situ prior to the growth of the next layer and terminating with a 0.45 SiGe alloy. This produces nearly fully relaxed 1.15pim thick structures with threading dislocation densities of 4 × 106cm−2. Limited area growth on Si suggests that elastically relaxed material free of both threading and misfit dislocations can be produced.

Optical properties of InGaN/GaN MQW LEDs grown on Si (111) substrates with low threading dislocation densities

2014 ◽  
Author(s):  
Shigeya Kimura ◽  
Jumpei Tajima ◽  
Hajime Nago ◽  
Toshiki Hikosaka ◽  
Hisashi Yoshida ◽  
...  
Keyword(s):  
Optical Properties ◽  
Threading Dislocation ◽  
Dislocation Densities

Germanium Photodetectors for Silicon Microphotonics by Direct Epitaxy on Silicon

1999 ◽  
Vol 607 ◽  
Author(s):  
Hsin-Chiao Luan ◽  
Desmond R. Lim ◽  
Lorenzo Colace ◽  
Gianlorezo Masini ◽  
Gaetano Assanto ◽  
...  
Keyword(s):  
Chemical Vapor Deposition ◽  
Thermal Annealing ◽  
Vapor Deposition ◽  
Chemical Vapor ◽  
Annealing Process ◽  
Threading Dislocation ◽  
High Quality ◽  
Cyclic Annealing ◽  
Metal Semiconductor Metal ◽  
Dislocation Densities

AbstractWe have grown high-quality Ge epilayers on Si using two-step ultrahigh vacuum/chemical-vapor-deposition followed by post-growth cyclic thermal annealing. Cyclic annealing was effective in reducing threading dislocation densities. The annealing process was improved by optimizing the dislocation velocity. We fabricated and tested metal-semiconductor-metal planar photodetectors using Ge epilayers grown on Si. Our measurement showed an improvement in the photodetector performance as a result of the improved materials quality. The process described in this paper for making high-quality Ge on Si is uncomplicated and can be easily integrated with Si CMOS processes.

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