Laser scan registration for lateral epitaxy of silicon‐on‐insulator stripes on silicon substrates

1985 ◽  
Vol 57 (12) ◽  
pp. 5262-5267 ◽  
Author(s):  
P. Zorabedian ◽  
T. I. Kamins ◽  
C. I. Drowley
Keyword(s):  
Silicon On Insulator ◽  
Silicon Substrates ◽  
Scan Registration ◽  
Lateral Epitaxy

Subboundary Free Submicronic Devices on Laser-Recrystallized Silicon Oninsulator

1984 ◽  
Vol 35 ◽  
Author(s):  
A.J. Auberton-Herve ◽  
J.P. Joly ◽  
J.M. Hode ◽  
J.C. Castagna
Keyword(s):  
Channel Length ◽  
Silicon On Insulator ◽  
Ring Oscillator ◽  
Mos Transistors ◽  
Seed Structure ◽  
Leakage Currents ◽  
Industrial Processing ◽  
Laser Recrystallization ◽  
Dynamic Performances ◽  
Lateral Epitaxy

ABSTRACTSeeding from bulk silicon (lateral epitaxy) has been used in Ar+ laser recrystallization to achieve subboundary free silicon on insulator areas. On these areas C.MOS devices have been performed using almost entirely the standard processing steps of a bulk micronic C-MOS technology. n -MOS transistors with channel length as small as 0.3 um have shown very small leakage currents. This is attributed especially to the lack of subboundaries. A 40 % increase in the dynamic performances in comparison with equivalent size C-MOS bulk devices has been obtained (93 ps of delay time per stage for a 101 stages ring oscillator with 0.8 μm of channel length). This is the best result presented so far on recrystallized SOI. No special requirements are needed in the lay out of the circuit with the chosen seed structure. Furthermore an industrial processing rate for the laser recrystallization processing has been achieved using an elliptical laser beam, a high scan velocity (30 cm/s) and a 100 μm line to line scan step (a 4' wafer in 4 minutes).

A Study of Melting and Resolidification of Silicon-on-Insulator Structures Formed by Lateral Epitaxy

1985 ◽  
Vol 53 ◽  
Author(s):  
D A Williams ◽  
R A Mcmahon ◽  
D G Hasko ◽  
H Ahmed ◽  
G F Hopper ◽  
...  
Keyword(s):  
Cross Sections ◽  
Silicon On Insulator ◽  
One Dimensional ◽  
Wide Range ◽  
Background Temperature ◽  
Lateral Epitaxy ◽  
Polycrystalline Silicon Films ◽  
Beam Technique ◽  
Sweep Speed

ABSTRACTThe formation of silicon-on-insulator structures, by recrystallising polycrystalline silicon films with a dual electron beam technique, has been studied over a wide range of conditions. The quality of the layers has been assessed by examining cross-sections in the SEM and optical microscopy of the surface after a Secco etch. The range of line powers which gives device-worthy single crystal material becomes greater as the sweep speed increases and as the background temperature is reduced. The extent of melting into the substrate in the seed windows and below the isolating oxide was determined from the movement of an arsenic implant. The experimental results are compared to the predictions from a one dimensional model for the heat flow.

Comparison of the AlxGa1–xN/GaN Heterostructures Grown on Silicon-on-Insulator and Bulk-Silicon Substrates

2016 ◽  
Vol 63 (1) ◽  
pp. 345-352 ◽  
Author(s):  
Wai Hoe Tham ◽  
Diing Shenp Ang ◽  
Lakshmi Kanta Bera ◽  
Surani Bin Dolmanan ◽  
Thirumaleshwara N Bhat ◽  
...  
Keyword(s):  
Silicon On Insulator ◽  
Silicon Substrates ◽  
Bulk Silicon

scholarly journals Process Routes for Low Defect-Density GaN on Various Substrates Employing Pendeo-Epitaxial Growth Techniques

1999 ◽  
Vol 4 (S1) ◽  
pp. 477-483 ◽  
Author(s):  
K.J. Linthicum ◽  
T. Gehrke ◽  
D.B. Thomson ◽  
K.M. Tracy ◽  
E.P. Carlson ◽  
...  
Keyword(s):  
Single Crystal ◽  
Epitaxial Growth ◽  
Defect Density ◽  
Silicon Substrates ◽  
Tem Analysis ◽  
Preliminary Results ◽  
Sem And Tem ◽  
New Form ◽  
Lateral Epitaxy

GaN films have been grown on 6H-SiC substrates employing a new form of selective lateral epitaxy, namely pendeo-epitaxy. This technique forces regrowth to start exclusively on sidewalls of GaN seed structures. Both discrete pendeo-epitaxial microstructures and coalesced single crystal layers of GaN have been achieved. SEM and TEM analysis are used to evaluate the morphology of the resulting GaN films. Process routes leading to GaN pendeo-epitaxial growth using silicon substrates have also been achieved and the preliminary results are discussed.

SiC Freestanding Micromechanical Structures on Silicon-On-Insulator Substrates

2009 ◽  
Vol 615-617 ◽  
pp. 617-620 ◽  
Author(s):  
Marcel Placidi ◽  
Marcin Zielinski ◽  
Gabriel Abadal ◽  
Josep Montserrat ◽  
Phillippe Godignon
Keyword(s):  
Chemical Etching ◽  
Growth Process ◽  
Vapour Deposition ◽  
Sacrificial Layer ◽  
Chemical Vapour ◽  
Silicon On Insulator ◽  
Silicon Substrates ◽  
Wet Chemical ◽  
Micromechanical Structures ◽  
Wet Chemical Etching

The fabrication of freestanding SiC microstructures on Silicon-On-Insulator (SOI) and semi-insulating Silicon substrates is reported. SiC layers were grown on SOI and semi-insulating Si by chemical vapour deposition (CVD) and to avoid the instability currently obtained in SOI structures, the growth process parameters have been optimized. Isotropic wet chemical etching of the Si sacrificial layer released the electrostatic SiC microstructures patterned by dry etching. Moreover a new concept for reducing the gap between resonators and electrodes by the uses of bistable mobile electrodes is introduced.

Process Routes for Low Defect-Density GaN on Various Substrates Employing Pendeo-Epitaxial Growth Techniques

1998 ◽  
Vol 537 ◽  
Author(s):  
K.J. Linthicum ◽  
T. Gehrke ◽  
D.B. Thomson ◽  
K.M. Tracy ◽  
E.P. Carlson ◽  
...  
Keyword(s):  
Single Crystal ◽  
Epitaxial Growth ◽  
Defect Density ◽  
Silicon Substrates ◽  
Tem Analysis ◽  
Preliminary Results ◽  
Sem And Tem ◽  
New Form ◽  
Lateral Epitaxy

AbstractGaN films have been grown on 6H-SiC substrates employing a new form of selective lateral epitaxy, namely pendeo-epitaxy. This technique forces regrowth to start exclusively on sidewalls of GaN seed structures. Both discrete pendeo-epitaxial microstructures and coalesced single crystal layers of GaN have been achieved. SEM and TEM analysis are used to evaluate the morphology of the resulting GaN films. Process routes leading to GaN pendeo-epitaxial growth using silicon substrates have also been achieved and the preliminary results are discussed.

Summary Abstract: Seeded lateral epitaxy in silicon‐on‐insulator structures

1987 ◽  
Vol 5 (4) ◽  
pp. 1393-1394 ◽  
Author(s):  
T. Warabisako ◽  
T. Tokuyama ◽  
M. Tamura ◽  
M. Miyao
Keyword(s):  
Silicon On Insulator ◽  
Lateral Epitaxy

Laser-induced lateral epitaxy in fully depleted silicon-on-insulator junctions

2002 ◽  
Vol 81 (12) ◽  
pp. 2238-2240 ◽  
Author(s):  
Kevin K. Dezfulian ◽  
J. Peter Krusius ◽  
Michael O. Thompson ◽  
Somit Talwar
Keyword(s):  
Silicon On Insulator ◽  
Fully Depleted ◽  
Lateral Epitaxy

Selective lateral epitaxy of dislocation-free InP on silicon-on-insulator

2019 ◽  
Vol 114 (19) ◽  
pp. 192105 ◽  
Author(s):  
Yu Han ◽  
Ying Xue ◽  
Kei May Lau
Keyword(s):  
Silicon On Insulator ◽  
Lateral Epitaxy

scholarly journals Ионный синтез структур кремний на изоляторе" со свинцово-силикатным изолирующим слоем

2021 ◽  
Vol 47 (14) ◽  
pp. 47
Author(s):  
Э.Ю. Бучин ◽  
Ю.И. Денисенко
Keyword(s):  
Silicon Layer ◽  
Silicon On Insulator ◽  
Lead Ions ◽  
Silicate Layer ◽  
Silicon Substrates ◽  
Oxygen Ions ◽  
Current Voltage ◽  
Current Voltage Characteristics ◽  
Post Implantation

The process of ionic synthesis of “silicon-on-insulator” structures based on the sequential implantation of oxygen ions and a glass former into silicon substrates has been investigated. Lead ions were used as a glass former. The features of the formation of a buried silicate layer during post-implantation annealing are considered. The current-voltage characteristics of the synthesized structures, as well as the specific electrical resistances of the insulator and the device silicon layer, have been measured.

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