Lateral variations in threshold voltage of an AlxGa1−xN/GaN heterostructure field-effect transistor measured by scanning capacitance spectroscopy

2001 ◽  
Vol 78 (1) ◽  
pp. 88-90 ◽  
Author(s):  
Daniel M. Schaadt ◽  
Eric J. Miller ◽  
Edward T. Yu ◽  
Joan M. Redwing
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Effect Transistor ◽  
Capacitance Spectroscopy ◽  
Gan Heterostructure ◽  
Lateral Variations

scholarly journals Growth and Device Performance of AlGaN/GaN Heterostructure with AlSiC Precoverage on Silicon Substrate

2014 ◽  
Vol 2014 ◽  
pp. 1-6
Author(s):  
Jae-Hoon Lee ◽  
Jung-Hee Lee
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Film Growth ◽  
Drain Current ◽  
Device Performance ◽  
Wetting Layer ◽  
Si Substrate ◽  
Effect Transistor ◽  
Gan Heterostructure

A crack-free AlGaN/GaN heterostructure was grown on 4-inch Si (111) substrate with initial dot-like AlSiC precoverage layer. It is believed that introducing the AlSiC layer between AlN wetting layer and Si substrate is more effective in obtaining a compressively stressed film growth than conventional Al precoverage on Si surface. The metal semiconductor field effect transistor (MESFET), fabricated on the AlGaN/GaN heterostructure grown with the AlSiC layer, exhibited normally on characteristics, such as threshold voltage of −2.3 V, maximum drain current of 370 mA/mm, and transconductance of 124 mS/mm.

scholarly journals Silicon Field Effect Transistor as the Nonlinear Detector for Terahertz Autocorellators

Sensors ◽  
2018 ◽  
Vol 18 (11) ◽  
pp. 3735 ◽  
Author(s):  
Kęstutis Ikamas ◽  
Ignas Nevinskas ◽  
Arūnas Krotkus ◽  
Alvydas Lisauskas
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Cryogenic Cooling ◽  
Thz Radiation ◽  
Gate Bias ◽  
Large Signal ◽  
Wide Range ◽  
Effect Transistor ◽  
Thz Power

We demonstrate that the rectifying field effect transistor, biased to the subthreshold regime, in a large signal regime exhibits a super-linear response to the incident terahertz (THz) power. This phenomenon can be exploited in a variety of experiments which exploit a nonlinear response, such as nonlinear autocorrelation measurements, for direct assessment of intrinsic response time using a pump-probe configuration or for indirect calibration of the oscillating voltage amplitude, which is delivered to the device. For these purposes, we employ a broadband bow-tie antenna coupled Si CMOS field-effect-transistor-based THz detector (TeraFET) in a nonlinear autocorrelation experiment performed with picoseconds-scale pulsed THz radiation. We have found that, in a wide range of gate bias (above the threshold voltage V th = 445 mV), the detected signal follows linearly to the emitted THz power. For gate bias below the threshold voltage (at 350 mV and below), the detected signal increases in a super-linear manner. A combination of these response regimes allows for performing nonlinear autocorrelation measurements with a single device and avoiding cryogenic cooling.

Improvement of AlGaN/GaN Heterostructure Field Effect Transistor Characteristics by Using Two-Step Ohmic Contact Process

2003 ◽  
Vol 42 (Part 1, No. 4B) ◽  
pp. 2309-2312 ◽  
Author(s):  
Dong-Hyun Cho ◽  
Mitsuaki Shimizu ◽  
Toshihide Ide ◽  
Byoungrho Shim ◽  
Hajime Okumura
Keyword(s):  
Ohmic Contact ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Contact Process ◽  
Effect Transistor ◽  
Gan Heterostructure

scholarly journals An Improved UU-MESFET with High Power Added Efficiency

Micromachines ◽  
2018 ◽  
Vol 9 (11) ◽  
pp. 573 ◽  
Author(s):  
Hujun Jia ◽  
Mei Hu ◽  
Shunwei Zhu
Keyword(s):  
Breakdown Voltage ◽  
Threshold Voltage ◽  
High Power ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Drain Current ◽  
Power Added Efficiency ◽  
Effect Transistor ◽  
The Relationship

An improved ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (IUU-MESFET) is proposed in this paper. The structure is obtained by modifying the ultrahigh upper gate height h of the ultrahigh upper gate 4H-SiC metal semiconductor field effect transistor (UU-MESFET) structure, and the h is 0.1 μm and 0.2 μm for the IUU-MESFET and UU-MESFET, respectively. Compared with the UU-MESFET, the IUU-MESFET structure has a greater threshold voltage and trans-conductance, and smaller breakdown voltage and saturation drain current, and when the ultrahigh upper gate height h is 0.1 μm, the relationship between these parameters is balanced, so as to solve the contradictory relationship that these parameters cannot be improved simultaneously. Therefore, the power added efficiency (PAE) of the IUU-MESFET structure is increased from 60.16% to 70.99% compared with the UU-MESFET, and advanced by 18%.

scholarly journals The impact of channel fin width on electrical characteristics of Si-FinFET

2022 ◽  
Vol 12 (1) ◽  
pp. 201
Author(s):  
Yousif Atalla ◽  
Yasir Hashim ◽  
Abdul Nasir Abd. Ghafar
Keyword(s):  
Threshold Voltage ◽  
Field Effect ◽  
Field Effect Transistor ◽  
Environmental Temperature ◽  
Simulation Tool ◽  
Electrical Characteristics ◽  
Working Temperature ◽  
Effect Transistor ◽  
The Impact ◽  
The Ideal

<span>This paper studies the impact of fin width of channel on temperature and electrical characteristics of fin field-effect transistor (FinFET). The simulation tool multi-gate field effect transistor (MuGFET) has been used to examine the FinFET characteristics. Transfer characteristics with various temperatures and channel fin width (W<sub>F</sub>=5, 10, 20, 40, and 80 nm) are at first simulated in this study. The results show that the increasing of environmental temperature tends to increase threshold voltage, while the subthreshold swing (SS) and drain-induced barrier lowering (DIBL) rise with rising working temperature. Also, the threshold voltage decreases with increasing channel fin width of transistor, while the SS and DIBL increase with increasing channel fin width of transistor, at minimum channel fin width, the SS is very near to the best and ideal then its value grows and going far from the ideal value with increasing channel fin width. So, according to these conditions, the minimum value as possible of fin width is the preferable one for FinFET with better electrical characteristics.</span>

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