Controllable capacitance–voltage hysteresis width in the aluminum–cerium-dioxide–silicon metal–insulator–semiconductor structure: Application to nonvolatile memory devices without ferroelectrics

2000 ◽  
Vol 76 (14) ◽  
pp. 1881-1883 ◽  
Author(s):  
L. Kim ◽  
J. Kim ◽  
D. Jung ◽  
Y. Roh
Keyword(s):  
Nonvolatile Memory ◽  
Cerium Dioxide ◽  
Semiconductor Structure ◽  
Memory Devices ◽  
Metal Insulator ◽  
Hysteresis Width ◽  
Metal Insulator Semiconductor ◽  
Capacitance Voltage ◽  
Nonvolatile Memory Devices ◽  
Voltage Hysteresis

Capacitance-voltage measurements on a p-type InSb metal/insulator/semiconductor structure with Si3N4 as the insulator

1989 ◽  
Vol 168 (2) ◽  
pp. 157-163 ◽  
Author(s):  
B. Ullrich ◽  
F. Kuchar ◽  
R. Meisels ◽  
F. Olcaytug ◽  
A. Jachimowicz
Keyword(s):  
Semiconductor Structure ◽  
Metal Insulator ◽  
Metal Insulator Semiconductor ◽  
Capacitance Voltage ◽  
P Type

Silicon Nanocrystalline Nonvolatile Memory - Characterization and Analysis

2016 ◽  
Vol 39 ◽  
pp. 134-150
Author(s):  
Valerii Ievtukh ◽  
A. Nazarov
Keyword(s):  
Nonvolatile Memory ◽  
Silicon Nanocrystals ◽  
Memory Window ◽  
Experimental Results ◽  
Memory Devices ◽  
Mos Capacitor ◽  
Mos Structure ◽  
Capacitance Voltage ◽  
Nonvolatile Memory Devices ◽  
Bipolar Memory

In this work, nanocrystal nonvolatile memory devices comprising of silicon nanocrystals located in gate oxide of MOS structure, were comprehensively studied on specialized modular data acquisition setup developed for capacitance-voltage measurements. The memory window formation, memory window retention and charge relaxation experimental methods were used to study the trapping/emission processes inside the dielectric layer of MOS capacitor memory. The trapping/emission processes were studied in standard bipolar memory mode and in new unipolar memory mode, which is specific for nanocrystalline nonvolatile memory. The analysis of experimental results shown that unipolar programming mode is more favourable for nanocrystalline memory operation due to lower wearing out and higher breakdown immunity of the MOS device’s oxide. The study was performed for two types of nanocrystalline memory devices: with one and two silicon nanocrystalline 2D layers in oxide of MOS structure correspondingly. The electrostatic modelling was presented to explain the experimental results.

IMPLEMENTATION OF THE TWO-FREQUENCY METHOD FOR MEASURING THE DERIVATIVE OF CAPACITANCE-VOLTAGE CHARACTERISTIC

2021 ◽  
pp. 44-51
Author(s):  
N. I. Lysenko ◽  
V. G. Polovinkin
Keyword(s):  
Numerical Differentiation ◽  
Voltage Characteristic ◽  
Semiconductor Structure ◽  
Measuring System ◽  
Frequency Method ◽  
Metal Insulator ◽  
Metal Insulator Semiconductor ◽  
Capacitance Voltage ◽  
Silicon Based ◽  
Derivatives Of

The article presents an example of the implementation of the two-frequency method for measuring the derivative of the capacitance-voltage characteristic. The authors describe the diagram of the measuring system and the software package for the measurement process control. The article also gives the results of measurements of the capacitance-voltage characteristic and its derivative of the silicon-based metal-insulator-semiconductor structure. The qualitative differences between the derivatives of the capacitive characteristics of the metal-insulator-semiconductor structure were obtained as a result of numerical differentiation and its direct measurement by the two-frequency method. The authors offer an explanation for this difference.

Nonvolatile Memory Devices with NiSi2/CoSi2 Nanocrystals

2007 ◽  
Vol 7 (1) ◽  
pp. 339-343 ◽  
Author(s):  
P. H. Yeh ◽  
L. J. Chen ◽  
P. T. Liu ◽  
D. Y. Wang ◽  
T. C. Chang
Keyword(s):  
Metal Oxide ◽  
Nonvolatile Memory ◽  
Semiconductor Industry ◽  
Metal Oxide Semiconductor ◽  
Oxide Semiconductor ◽  
Semiconductor Structures ◽  
Retention Characteristic ◽  
Capacitance Voltage ◽  
Nonvolatile Memory Devices ◽  
Voltage Hysteresis

Metal-oxide-semiconductor structures with NiSi2 and CoSi2 nanocrystals embedded in the SiO2 layer have been fabricated. A pronounced capacitance–voltage hysteresis was observed with a memory window about 1 V under low programming voltage. The retention characteristic can be improved by using HfO2 layer as control oxide. The processing of the structure is compatible with the current manufacturing technology of semiconductor industry.

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