Effect of polysilicon depletion effect on series resistance and transconductance of MOS transistors at 4.2 K

1998 ◽  
Vol 34 (12) ◽  
pp. 1264 ◽  
Author(s):  
E.A. Gutiérrez-D.
Keyword(s):  
Series Resistance ◽  
Mos Transistors ◽  
Depletion Effect

scholarly journals Series resistance effects in submicron MOS transistors operated from 300 K down to 4.2 K

1994 ◽  
Vol 04 (C6) ◽  
pp. C6-31-C6-36
Author(s):  
E. A. Gutiérrez-D ◽  
L. Deferm ◽  
G. Declerck
Keyword(s):  
Series Resistance ◽  
Mos Transistors

Influence of series resistance determination on the extracted mobility in MOS transistors with Ge channel

2013 ◽  
Author(s):  
Jakub Jasiński ◽  
Lidia Łukasiak ◽  
Andrzej Jakubowski ◽  
Catarina Casteleiro ◽  
Terry E. Whall ◽  
...  
Keyword(s):  
Series Resistance ◽  
Mos Transistors

Effect of Spacer Scaling on PMOS Transistors

2006 ◽  
Vol 913 ◽  
Author(s):  
Wai Shing Lau ◽  
Chee Wee Eng ◽  
David Vigar ◽  
Lap Chan ◽  
Soh Yun Siah
Keyword(s):  
Linear Relationship ◽  
Series Resistance ◽  
State Of The Art ◽  
Resistance Mechanism ◽  
Channel Length ◽  
Mos Transistors ◽  
Effective Channel

AbstractOur observation is that both the on-current and off-current of state-of-the-art p-channel MOS transistors tend to become larger when the L-shaped spacer becomes smaller due to two different mechanisms: a decrease in the effective channel length Leff (Mechanism A) and a decrease in the series resistance (Mechanism B). In our analysis, we use drain induced barrier lowering (DIBL) as a measure of Leff and we assume that there is a linear relationship between the on-current, the logarithm of the off current and DIBL. Our assumption is supported by our theoretical derivations.

Behavior of contact-silicided TFSOI gate structures

1994 ◽  
Vol 52 ◽  
pp. 860-861
Author(s):  
N. David Theodore ◽  
Juergen Foerstner ◽  
Peter Fejes
Keyword(s):  
Semiconductor Device ◽  
Series Resistance ◽  
Field Effect Transistors ◽  
Silicon Layer ◽  
Device Fabrication ◽  
Silicon On Insulator ◽  
Continuous Layer ◽  
Buried Oxide ◽  
Device Structures ◽  
Thin Silicon

As semiconductor device dimensions shrink and packing-densities rise, issues of parasitic capacitance and circuit speed become increasingly important. The use of thin-film silicon-on-insulator (TFSOI) substrates for device fabrication is being explored in order to increase switching speeds. One version of TFSOI being explored for device fabrication is SIMOX (Silicon-separation by Implanted OXygen).A buried oxide layer is created by highdose oxygen implantation into silicon wafers followed by annealing to cause coalescence of oxide regions into a continuous layer. A thin silicon layer remains above the buried oxide (~220 nm Si after additional thinning). Device structures can now be fabricated upon this thin silicon layer.Current fabrication of metal-oxidesemiconductor field-effect transistors (MOSFETs) requires formation of a polysilicon/oxide gate between source and drain regions. Contact to the source/drain and gate regions is typically made by use of TiSi2 layers followedby Al(Cu) metal lines. TiSi2 has a relatively low contact resistance and reduces the series resistance of both source/drain as well as gate regions

The Ego Could Be Depleted, Providing Initial Exertion Is Depleting

2017 ◽  
Vol 48 (4) ◽  
pp. 242-245 ◽  
Author(s):  
Junhua Dang ◽  
Ying Liu ◽  
Xiaoping Liu ◽  
Lihua Mao
Keyword(s):  
Stroop Task ◽  
Meta Analysis ◽  
Ego Depletion ◽  
Current Experiment ◽  
The Past ◽  
Depletion Effect

Abstract. The ego depletion effect has been examined by over 300 independent studies during the past two decades. Despite its pervasive influence, recently this effect has been severely challenged and asserted to be a fake. Based on an up-to-date meta-analysis that examined the effectiveness of each frequently used depleting task, we preregistered the current experiment with the aim to examine whether there would be an ego depletion effect when the Stroop task is used as the depleting task. The results demonstrated a significant ego depletion effect. The current research highlights the importance of the depleting task’s effectiveness. That is to say, the “ego” could be “depleted,” but only when initial exertion is “depleting.”

The Limits of Ego Depletion

2019 ◽  
Vol 50 (5-6) ◽  
pp. 292-304 ◽  
Author(s):  
Mario Wenzel ◽  
Marina Lind ◽  
Zarah Rowland ◽  
Daniela Zahn ◽  
Thomas Kubiak
Keyword(s):  
Research Agenda ◽  
Statistical Power ◽  
Interindividual Variability ◽  
Ego Depletion ◽  
Crossover Design ◽  
Effect Sizes ◽  
Future Research ◽  
Future Research Agenda ◽  
Depletion Effect ◽  
Within Subjects

Abstract. Evidence on the existence of the ego depletion phenomena as well as the size of the effects and potential moderators and mediators are ambiguous. Building on a crossover design that enables superior statistical power within a single study, we investigated the robustness of the ego depletion effect between and within subjects and moderating and mediating influences of the ego depletion manipulation checks. Our results, based on a sample of 187 participants, demonstrated that (a) the between- and within-subject ego depletion effects only had negligible effect sizes and that there was (b) large interindividual variability that (c) could not be explained by differences in ego depletion manipulation checks. We discuss the implications of these results and outline a future research agenda.

ANALYSIS OF HOT CARRIER DEGRADATION IN AC STRESSED N-CHANNEL MOS TRANSISTORS USING THE CHARGE PUMPING TECHNIQUE

1988 ◽  
Vol 49 (C4) ◽  
pp. C4-651-C4-655 ◽  
Author(s):  
R. BELLENS ◽  
P. HEREMANS ◽  
G. GROESENEKEN ◽  
H. E. MAES
Keyword(s):  
Mos Transistors ◽  
Charge Pumping ◽  
Hot Carrier ◽  
Hot Carrier Degradation
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