Characterisation ofn-channel germanium MOSFET with gate insulator formed by high-pressure thermal oxidation

1987 ◽  
Vol 23 (1) ◽  
pp. 8-10 ◽  
Author(s):  
E.E. Crisman ◽  
J.I. Lee ◽  
P.J. Stiles ◽  
O.J. Gregory
Keyword(s):  
High Pressure ◽  
Thermal Oxidation ◽  
Gate Insulator

High-pressure oxidation for thin gate insulator process

1982 ◽  
Vol 29 (4) ◽  
pp. 503-507 ◽  
Author(s):  
M. Hirayama ◽  
H. Miyoshi ◽  
N. Tsubouchi ◽  
H. Abe
Keyword(s):  
High Pressure ◽  
Gate Insulator ◽  
Pressure Oxidation ◽  
High Pressure Oxidation

Redistribution of arsenic in silicon during high pressure thermal oxidation

1987 ◽  
Vol 50 (11) ◽  
pp. 688-690 ◽  
Author(s):  
Seong S. Choi ◽  
M. Z. Numan ◽  
W. K. Chu ◽  
J. K. Srivastava ◽  
E. A. Irene
Keyword(s):  
High Pressure ◽  
Thermal Oxidation

High-pressure thermal oxidation of gallium arsenide at 250°C

1987 ◽  
Vol 23 (24) ◽  
pp. 1329 ◽  
Author(s):  
K.N. Bhat ◽  
N. Basu
Keyword(s):  
High Pressure ◽  
Gallium Arsenide ◽  
Thermal Oxidation

High‐pressure thermal oxidation of InP in steam

1988 ◽  
Vol 63 (2) ◽  
pp. 506-509 ◽  
Author(s):  
R. G. Gann ◽  
K. M. Geib ◽  
C. W. Wilmsen ◽  
J. Costello ◽  
G. Hrychowain ◽  
...  
Keyword(s):  
High Pressure ◽  
Thermal Oxidation

PECVD Deposited TEOS for Field-Effect Mobility Improvement in 4H-SiC MOSFETs on the (0001) and (11-20) Faces

2006 ◽  
Vol 527-529 ◽  
pp. 1047-1050 ◽  
Author(s):  
Amador Pérez-Tomás ◽  
Phillippe Godignon ◽  
Jean Camassel ◽  
Narcis Mestres ◽  
Véronique Soulière
Keyword(s):  
Low Temperature ◽  
Thermal Oxidation ◽  
Field Effect ◽  
Gate Insulator ◽  
Interface Trap Density ◽  
Field Effect Mobility ◽  
Plasma Enhanced Cvd ◽  
Favorable Conditions ◽  
Very High ◽  
Deposition Conditions

4H-SiC MOSFET devices with low temperature dry thermal oxidation (1050 °C 1 h) and TEOS plasma enhanced CVD deposited oxides on 4H-SiC substrates have been analysed in this paper. MOSFET transistors have been fabricated on the 4H-SiC (0001) Si face. The mobility improvement (up to 38-45 cm2/Vs) is remarkable compared with standard oxidation (<10 cm2/Vs). In addition, very high (but controversial) field-effect mobilities of around 216 cm2/Vs have also been extracted for MOSFETs fabricated on the (11-20) face. Taking into account the threshold voltage and the sub-threshold slope (S), we can see that we have three different ways to increase the mobility. First, by using (11-20) face material as already proposed. Second, by reducing the interface trap density as done with the low temperature thermal oxidation plus deposited oxide. And third, under the most favorable conditions with adequate TEOS deposition conditions. In this last case, the mobility improvement seems to be related with the gate current leakage more than (or together with) an interface traps reduction of the gate insulator.

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