CMOS design technique to eliminate the stuck-open fault problem of testability

1984 ◽  
Vol 20 (19) ◽  
pp. 758 ◽  
Author(s):  
A.F. Murray
Keyword(s):  
Design Technique ◽  
Cmos Design

A digital CMOS design technique for SEU hardening

2000 ◽  
Vol 47 (6) ◽  
pp. 2603-2608 ◽  
Author(s):  
M.P. Baze ◽  
S.P. Buchner ◽  
D. McMorrow
Keyword(s):  
Design Technique ◽  
Digital Cmos ◽  
Cmos Design

Implementation of the MIMIC Robust Design Technique

1997 ◽  
Author(s):  
David C. Williamson ◽  
Clare D. Thiem
Keyword(s):  
Robust Design ◽  
Design Technique

Radiation Effects on a Small DC-DC Converter and a Remedy by Circuit Design Technique

2002 ◽  
Author(s):  
C. H. Truong ◽  
E. J. Simburger ◽  
R. C. Lacoe ◽  
J. C. Ross ◽  
S. Brown
Keyword(s):  
Circuit Design ◽  
Radiation Effects ◽  
Design Technique

Design Technique of High Power Efficiency LLC DC-DC Converters for Photovoltaic Cells

2018 ◽  
Vol 2 (1) ◽  
pp. 30
Author(s):  
Hisatsugu Kato ◽  
Yoichi Ishizuka ◽  
Kohei Ueda ◽  
Shotaro Karasuyama ◽  
Atsushi Ogasahara
Keyword(s):  
High Power ◽  
Power Efficiency ◽  
Photovoltaic Cells ◽  
Input Voltage ◽  
Design Technique ◽  
Load Range ◽  
Voltage Range ◽  
Simulation Results ◽  
Secondary Side ◽  
High Power Efficiency

This paper proposes a design technique of high power efficiency LLC DC-DC Converters for Photovoltaic Cells. The secondary side circuit and transformer fabrication of proposed circuit are optimized for overcoming the disadvantage of limited input voltage range and, realizing high power efficiency over a wide load range of LLC DC-DC converters. The optimized technique is described with theoretically and with simulation results. Some experimental results have been obtained with the prototype circuit designed for the 80 - 400 V input voltage range. The maximum power efficiency is 98 %.

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