output prediction logic
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Design High Performance Combinational Circuits Using Output Prediction Logic-OPL Technique

IOSR Journal of Electronics and Communication Engineering ◽

10.9790/2834-1202013641 ◽

2017 ◽

Vol 12 (02) ◽

pp. 36-41

Author(s):

Vikramaditya Dahiya ◽

Mr. Vikas Mittal

Keyword(s):

High Performance ◽

Combinational Circuits ◽

Prediction Logic ◽

Output Prediction Logic

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A 64b adder using self-calibrating differential output prediction logic

2006 IEEE International Solid State Circuits Conference - Digest of Technical Papers ◽

10.1109/isscc.2006.1696231 ◽

2006 ◽

Author(s):

K.H. Chong ◽

L. McMurchie ◽

C. Sechen

Keyword(s):

Prediction Logic ◽

Output Prediction Logic

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High throughput divider using output prediction logic

Research in Microelectronics and Electronics, 2005 PhD ◽

10.1109/rme.2005.1542964 ◽

2005 ◽

Author(s):

Xinyu Guo ◽

C. Sechen

Keyword(s):

High Throughput ◽

Prediction Logic ◽

Output Prediction Logic

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409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.2 ◽

2005 ◽

Author(s):

Sheng Sun ◽

Yi Han ◽

Xinyu Guo ◽

Kian Haur Chong ◽

L. McMurchie ◽

...

Keyword(s):

Prediction Logic ◽

Output Prediction Logic

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High Speed Redundant Adder and Divider in Output Prediction Logic

IEEE Computer Society Annual Symposium on VLSI: New Frontiers in VLSI Design (ISVLSI'05) ◽

10.1109/isvlsi.2005.38 ◽

2005 ◽

Author(s):

Xinyu Guo ◽

C. Sechen

Keyword(s):

High Speed ◽

Prediction Logic ◽

Output Prediction Logic

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A high-performance 64-bit adder implemented in output prediction logic

Proceedings 2001 Conference on Advanced Research in VLSI. ARVLSI 2001 ◽

10.1109/arvlsi.2001.915562 ◽

2002 ◽

Cited By ~ 1

Author(s):

Sheng Sun ◽

L. McMurchie ◽

C. Sechen

Keyword(s):

High Performance ◽

Prediction Logic ◽

Output Prediction Logic

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Application of output prediction logic to differential CMOS

Proceedings IEEE Computer Society Workshop on VLSI 2001. Emerging Technologies for VLSI Systems ◽

10.1109/iwv.2001.923140 ◽

2002 ◽

Cited By ~ 3

Author(s):

S. Kio ◽

L. McMurchie ◽

C. Sechen

Keyword(s):

Prediction Logic ◽

Output Prediction Logic

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Output prediction logic: a high-performance CMOS design technique

Proceedings 2000 International Conference on Computer Design ◽

10.1109/iccd.2000.878293 ◽

2002 ◽

Cited By ~ 20

Author(s):

L. McMurchie ◽

S. Kio ◽

G. Yee ◽

T. Thorp ◽

C. Sechen

Keyword(s):

High Performance ◽

Design Technique ◽

Prediction Logic ◽

Cmos Design ◽

Output Prediction Logic

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output prediction logicRecently Published Documents

TOTAL DOCUMENTS

H-INDEX

Design High Performance Combinational Circuits Using Output Prediction Logic-OPL Technique

A 64b adder using self-calibrating differential output prediction logic

High throughput divider using output prediction logic

409ps 4.7 FO4 64b Adder Based on Output Prediction Logic in 0.18um CMOS

High Speed Redundant Adder and Divider in Output Prediction Logic

A high-performance 64-bit adder implemented in output prediction logic

Application of output prediction logic to differential CMOS

Output prediction logic: a high-performance CMOS design technique

output prediction logic
Recently Published Documents