Transient analysis of printed circuit board structures using a time domain solution of Kirchoff's network equations

1997 ◽  
Author(s):  
C.J. Railton
Keyword(s):  
Time Domain ◽  
Transient Analysis ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit

Chiral Media Based on Printed-Circuit Board Technology: A Numerical Time-Domain Approach

2009 ◽  
Vol 45 (3) ◽  
pp. 1170-1173 ◽  
Author(s):  
I. Barba ◽  
A. Cabeceira ◽  
A. Gomez ◽  
J. Represa
Keyword(s):  
Time Domain ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Chiral Media ◽  
Printed Circuit

scholarly journals Time domain coupling to a device on a printed circuit board inside a cavity

Radio Science ◽  
2005 ◽  
Vol 40 (6) ◽  
pp. n/a-n/a ◽  
Author(s):  
Chatrpol Lertsirimit ◽  
David R. Jackson ◽  
Donald R. Wilton
Keyword(s):  
Time Domain ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Domain Coupling

scholarly journals Development of infrared thermal mapping technique for electronic devices

2021 ◽  
Author(s):  
Sanjay Ailani
Keyword(s):  
Steady State ◽  
Transient Analysis ◽  
Printed Circuit Board ◽  
Electronic Device ◽  
Circuit Board ◽  
Experimental Setup ◽  
Test Setup ◽  
Printed Circuit ◽  
Thermal Mapping ◽  
Heat Spreading

The goal of this research project is to develop an experimental setup that is capable of demonstrating thermal behavior of the electronic device. The project focuses on thermal mapping at device, integrated circuit and printed circuit board (PCB) level. A unique technique to perform thermal mapping on integrated circuits and printed circuit board based on Infrared Thermography is proposed in this research project. The developed experimental setup is capable of performing steady state and transient analysis at device and PCB level. The proposed test setup is applied to perform thermal mapping on 68HC11 microcontroller board to predict accurate temperature distribution on the real time operating printed circuit board. The accuracy and validation of the experimental setup are the two major challenges faced in this work. Apart from this, to know the exact transistor junction temperature, it is necessary to develop methodology that prevents heat spreading, allows proper cooling and the one that provides stable cooling thermal coefficient. The performance of infrared thermography has been validated against thermocouple results. The experimental results are compared with the ones obtained by digital thermometer. In order to achieve stability and certainty in the results, insulated environment is preferred. Thermocouple results can be taken as reference since it is in physical contact with the die or the package. Cooling of the electronic device is also performed in this work. Oil based heatsink has been implemented using mineral Aldrich oil which is specially designed for IR spectroscopy. Several different combinations of layers of coating of Boron Nitride spray and black spray paint are deployed with different emissivity settings. The effect of the number of color layer coatings and emissivity values have been investigated. Various challenges pertaining to heat spreading, heat dependent cooling coefficients and spatial resolution have been resolved. The performance of the test setup has been evaluated for both steady state and transient analysis. In additon, thermocouple results have been taken as reference.

scholarly journals Optimization of a Gate Distribution Layout to Compensate the Current Imbalance Generated by the 3D Geometry of a Railway Inverter

Energies ◽  
2021 ◽  
Vol 14 (7) ◽  
pp. 1891
Author(s):  
Andressa Nakahata-Medrado ◽  
Jean-Luc Schanen ◽  
Jean-Michel Guichon ◽  
Pierre-Olivier Jeannin ◽  
Emmanuel Batista ◽  
...  
Keyword(s):  
Time Domain ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Time Domain Simulation ◽  
Optimization Strategy ◽  
Next Generation ◽  
Printed Circuit ◽  
3D Geometry ◽  
The Impact ◽  
Complete Investigation

The impact of the stray inductances originated from interconnects in power electronics becomes crucial with the next generation of SiC devices. This paper shows that the existing layout of a railway inverter, operating with Si IGBTs already exhibits a dynamic current imbalance between paralleled modules. This will not allow using this geometry with SiC MOSFETs. A complete investigation of the electromagnetic origin of this issue has been performed. A generic circuit model has been proposed to establish a cabling rule to design a Gate Distribution Printed Circuit Board (PCB) in such a way that it compensates the power dissymmetry. An optimization strategy has been used to obtain a new geometry of this PCB, which has been validated with a time domain simulation.

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