Metal-coated printed circuit board time domain reflectometry probes for measuring water and solute transport in soil

2003 ◽  
Vol 39 (7) ◽  
Author(s):  
Henrik H. Nissen ◽  
Paul A. Ferré ◽  
Per Moldrup
Keyword(s):  
Solute Transport ◽  
Time Domain ◽  
Printed Circuit Board ◽  
Time Domain Reflectometry ◽  
Circuit Board ◽  
Printed Circuit ◽  
Water And Solute Transport

Chiral Media Based on Printed-Circuit Board Technology: A Numerical Time-Domain Approach

2009 ◽  
Vol 45 (3) ◽  
pp. 1170-1173 ◽  
Author(s):  
I. Barba ◽  
A. Cabeceira ◽  
A. Gomez ◽  
J. Represa
Keyword(s):  
Time Domain ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Chiral Media ◽  
Printed Circuit

scholarly journals Time domain coupling to a device on a printed circuit board inside a cavity

Radio Science ◽  
2005 ◽  
Vol 40 (6) ◽  
pp. n/a-n/a ◽  
Author(s):  
Chatrpol Lertsirimit ◽  
David R. Jackson ◽  
Donald R. Wilton
Keyword(s):  
Time Domain ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Printed Circuit ◽  
Domain Coupling

scholarly journals Optimization of a Gate Distribution Layout to Compensate the Current Imbalance Generated by the 3D Geometry of a Railway Inverter

Energies ◽  
2021 ◽  
Vol 14 (7) ◽  
pp. 1891
Author(s):  
Andressa Nakahata-Medrado ◽  
Jean-Luc Schanen ◽  
Jean-Michel Guichon ◽  
Pierre-Olivier Jeannin ◽  
Emmanuel Batista ◽  
...  
Keyword(s):  
Time Domain ◽  
Printed Circuit Board ◽  
Circuit Board ◽  
Time Domain Simulation ◽  
Optimization Strategy ◽  
Next Generation ◽  
Printed Circuit ◽  
3D Geometry ◽  
The Impact ◽  
Complete Investigation

The impact of the stray inductances originated from interconnects in power electronics becomes crucial with the next generation of SiC devices. This paper shows that the existing layout of a railway inverter, operating with Si IGBTs already exhibits a dynamic current imbalance between paralleled modules. This will not allow using this geometry with SiC MOSFETs. A complete investigation of the electromagnetic origin of this issue has been performed. A generic circuit model has been proposed to establish a cabling rule to design a Gate Distribution Printed Circuit Board (PCB) in such a way that it compensates the power dissymmetry. An optimization strategy has been used to obtain a new geometry of this PCB, which has been validated with a time domain simulation.

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