scholarly journals Multilevel storage and photoinduced-reset memory by an inorganic perovskite quantum-dot/polystyrene floating-gate organic transistor

RSC Advances ◽  
2020 ◽  
Vol 10 (70) ◽  
pp. 43225-43232
Author(s):  
Risheng Jin ◽  
Jin Wang ◽  
Keli Shi ◽  
Beibei Qiu ◽  
Lanchao Ma ◽  
...  

A novel floating-gate organic transistor memory with photoinduced-reset and multilevel storage function is demonstrated. The device has a large memory window (≈90 V), ultrahigh memory on/off ratio (over 107) and long retention time (over 10 years).

2013 ◽  
Vol 34 (9) ◽  
pp. 1136-1138 ◽  
Author(s):  
Abhishek Mishra ◽  
Amritha Janardanan ◽  
Manali Khare ◽  
Hemen Kalita ◽  
Anil Kottantharayil

Nanomaterials ◽  
2021 ◽  
Vol 11 (5) ◽  
pp. 1101
Author(s):  
Muhammad Naqi ◽  
Nayoung Kwon ◽  
Sung Hyeon Jung ◽  
Pavan Pujar ◽  
Hae Won Cho ◽  
...  

Non-volatile memory (NVM) devices based on three-terminal thin-film transistors (TFTs) have gained extensive interest in memory applications due to their high retained characteristics, good scalability, and high charge storage capacity. Herein, we report a low-temperature (<100 °C) processed top-gate TFT-type NVM device using indium gallium zinc oxide (IGZO) semiconductor with monolayer gold nanoparticles (AuNPs) as a floating gate layer to obtain reliable memory operations. The proposed NVM device exhibits a high memory window (ΔVth) of 13.7 V when it sweeps from −20 V to +20 V back and forth. Additionally, the material characteristics of the monolayer AuNPs (floating gate layer) and IGZO film (semiconductor layer) are confirmed using transmission electronic microscopy (TEM), atomic force microscopy (AFM), and x-ray photoelectron spectroscopy (XPS) techniques. The memory operations in terms of endurance and retention are obtained, revealing highly stable endurance properties of the device up to 100 P/E cycles by applying pulses (±20 V, duration of 100 ms) and reliable retention time up to 104 s. The proposed NVM device, owing to the properties of large memory window, stable endurance, and high retention time, enables an excellent approach in futuristic non-volatile memory technology.


Author(s):  
Qingyan Li ◽  
Tengteng Li ◽  
Yating Zhang ◽  
Hongliang Zhao ◽  
Jie Li ◽  
...  

2003 ◽  
Vol 82 (11) ◽  
pp. 1787-1789 ◽  
Author(s):  
Masumi Saitoh ◽  
Eiji Nagata ◽  
Toshiro Hiramoto

2021 ◽  
Vol 13 (1) ◽  
Author(s):  
Seongin Hong ◽  
Junwoo Park ◽  
Jung Joon Lee ◽  
Sunjong Lee ◽  
Kyungho Yun ◽  
...  

AbstractTwo-dimensional transition metal dichalcogenide materials (TMDs), such as molybdenum disulfide (MoS2), have been considered promising candidates for future electronic applications owing to their electrical, mechanical, and optical properties. Here, we present a new concept for multifunctional MoS2 flash memory by combining a MoS2 channel with a PEDOT:PSS floating layer. The proposed MoS2 memory devices exhibit a switching ratio as high as 2.3 × 107, a large memory window (54.6 ± 7.80 V), and high endurance (>1,000 cycles). As the PEDOT:PSS film enables a low-temperature solution-coating process and mechanical flexibility, the proposed P-memory can be embedded on a polyimide substrate over a rigid silicon substrate, offering high mechanical endurance (over 1,000 cycle bending test). Furthermore, both MoS2 and PEDOT:PSS have a bandgap that is desirable in optoelectronic memory operation, where charge carriers are stored differently in the floating gate depending on light illumination. As a new application that combines photodiodes and memory functions, we demonstrate multilevel memory programming based on light intensity and color.


2020 ◽  
Vol 29 (01n04) ◽  
pp. 2040001
Author(s):  
N. R. Butterfield ◽  
R. Mays ◽  
B. Khan ◽  
R. Gudlavalleti ◽  
F. C. Jain

This paper presents the theory, fabrication and experimental testing results for a multiple state Non-Volatile Memory (NVM), comprised of hafnium oxide high-k dielectric tunnel and gate barriers as well as a Silicon Quantum Dot Superlattice (QDSL) implemented for the floating gate and inversion channel (QDG) and (QDC) respectively. With the conclusion of Moore’s Law for conventional transistor fabrication, regarding the minimum gate size, current efforts in memory cell research and development are focused on bridging the gap between the conventions of the past sixty years and the future of computing. One method of continuing the increasing chip density is to create multistate devices capable of storing and processing additional logic states beyond 1 and 0. Replacing the silicon nitride floating gate of a conventional Flash NVM with QDSL gives rise to minibands that result in greater control over charge levels stored in the QDG and additional intermediate states. Utilizing Hot Carrier Injection (HCI) programming, for the realized device, various magnitudes of gate voltage pulses demonstrated the ability to accurately control the charge levels stored in the QDG. This corresponds to multiple threshold voltage shifts allowing detection of multiple states during read operations.


2015 ◽  
Vol 26 (45) ◽  
pp. 455704 ◽  
Author(s):  
Jianling Meng ◽  
Rong Yang ◽  
Jing Zhao ◽  
Congli He ◽  
Guole Wang ◽  
...  

Nanoscale ◽  
2021 ◽  
Author(s):  
Shao-Huan Hong ◽  
Shakil N. Afraj ◽  
Ping-Yu Huang ◽  
Yi-Zi Yeh ◽  
Shih-Huang Tung ◽  
...  

Low-dimensional all-inorganic perovskite quantum dots (QDs) have been increasingly developed as photo-sensing materials in the field of photodetectors because of their strong light-absorption capability and broad bandgap tunability. Here, solution-processed...


Nanoscale ◽  
2019 ◽  
Vol 11 (11) ◽  
pp. 5021-5029 ◽  
Author(s):  
Qasim Khan ◽  
Alagesan Subramanian ◽  
Guannan Yu ◽  
Khan Maaz ◽  
Delong Li ◽  
...  

Although all-inorganic perovskite light emitting diodes (PeLED) have satisfactory stability under an ambient atmosphere, producing devices with high performance is challenging.


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