Charge trapping in HfO2 and HfSiO4 MOS gate dielectrics

2006 ◽  
Vol 50 (9-10) ◽  
pp. 1670-1672 ◽  
Author(s):  
Kyuhwan Chang ◽  
Feng-Ming Chang ◽  
Jerzy Ruzyllo
2004 ◽  
Vol 51 (6) ◽  
pp. 3143-3149 ◽  
Author(s):  
J.A. Felix ◽  
M.R. Shaneyfelt ◽  
D.M. Fleetwood ◽  
J.R. Schwank ◽  
P.E. Dodd ◽  
...  

1981 ◽  
Vol 4 ◽  
Author(s):  
C J Pollard ◽  
A E Glaccum ◽  
J D Speight

ABSTRACTThe optimum e-beam anneal conditions for damage free wafer annealing, implant activation uniformity across 3 inch wafers and low dose boron activation have been investigated with reference to the needs of MOS device processing. Some effects of e-beam annealing on MOS gate dielectrics are reported.


2006 ◽  
Vol 27 (3) ◽  
pp. 157-159 ◽  
Author(s):  
L. Aguilera ◽  
M. Porti ◽  
M. Nafria ◽  
X. Aymerich
Keyword(s):  

1997 ◽  
Vol 296 (1-2) ◽  
pp. 37-40 ◽  
Author(s):  
V. Ramgopal Rao ◽  
W. Hansch ◽  
H. Baumgärtner ◽  
I. Eisele ◽  
D.K. Sharma ◽  
...  

2019 ◽  
Vol 25 (3) ◽  
pp. 163-168 ◽  
Author(s):  
Bibhas Majhi ◽  
Chandreswar Mahata ◽  
C.K. Maiti

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