Worst case stress conditions for hot carrier induced degradation of p-channel SOI MOSFETs

2006 ◽  
Vol 50 (6) ◽  
pp. 929-934 ◽  
Author(s):  
D.P. Ioannou ◽  
R. Mishra ◽  
D.E. Ioannou ◽  
S.T. Liu ◽  
H.L. Hughes
Keyword(s):  
Stress Conditions ◽  
Worst Case ◽  
Hot Carrier

Worst Case Stress Conditions for Hot Carrier Degradation with Technology Nodes from 0.35µm to 45nm

2019 ◽  
Vol 44 (1) ◽  
pp. 1151-1155 ◽  
Author(s):  
Zhaoxing Chen ◽  
Xiaoli Ji ◽  
Fen Yan ◽  
Yi Shi ◽  
Yongliang Song ◽  
...  
Keyword(s):  
Stress Conditions ◽  
Worst Case ◽  
Hot Carrier ◽  
Technology Nodes ◽  
Hot Carrier Degradation

Worst Case Stress Conditions for Hot Carrier Induced Degradation of p-Channel SOI MOSFETs

2006 ◽  
Author(s):  
D.P. Ioannou ◽  
R. Mishra ◽  
D.E. Ioannou ◽  
S.T. Liu ◽  
M. Flanery ◽  
...  
Keyword(s):  
Stress Conditions ◽  
Worst Case ◽  
Hot Carrier

The Hot-Carrier-Induced Degradation of SoI LIGBT Under AC Stress Conditions

2013 ◽  
Vol 34 (12) ◽  
pp. 1548-1550 ◽  
Author(s):  
Shifeng Zhang ◽  
Yan Han ◽  
Koubao Ding ◽  
Bin Zhang ◽  
Wei Zhang ◽  
...  
Keyword(s):  
Stress Conditions ◽  
Hot Carrier

scholarly journals Correlated Time-0 and Hot-Carrier Stress Induced FinFET Parameter Variabilities: Modeling Approach

Micromachines ◽  
2020 ◽  
Vol 11 (7) ◽  
pp. 657
Author(s):  
Alexander Makarov ◽  
Philippe Roussel ◽  
Erik Bury ◽  
Michiel Vandemaele ◽  
Alessio Spessot ◽  
...  
Keyword(s):  
Correlation Analysis ◽  
Simulation Model ◽  
Drain Current ◽  
Operating Regime ◽  
Statistical Simulation ◽  
Stress Conditions ◽  
Hot Carrier ◽  
Modeling Approach ◽  
Hot Carrier Stress ◽  
Random Traps

We identify correlation between the drain currents in pristine n-channel FinFET transistors and changes in time-0 currents induced by hot-carrier stress. To achieve this goal, we employ our statistical simulation model for hot-carrier degradation (HCD), which considers the effect of random dopants (RDs) on HCD. For this analysis we generate a set of 200 device instantiations where each of them has its own unique configuration of RDs. For all “samples” in this ensemble we calculate time-0 currents (i.e., currents in undamaged FinFETs) and then degradation characteristics such as changes in the linear drain current and device lifetimes. The robust correlation analysis allows us to identify correlation between transistor lifetimes and drain currents in unstressed devices, which implies that FinFETs with initially higher currents degrade faster, i.e., have more prominent linear drain current changes and shorter lifetimes. Another important result is that although at stress conditions the distribution of drain currents becomes wider with stress time, in the operating regime drain current variability diminishes. Finally, we show that if random traps are also taken into account, all the obtained trends remain the same.

Microscopic Hot-Carrier Degradation Modeling of SiGe HBTs Under Stress Conditions Close to the SOA Limit

2017 ◽  
Vol 64 (3) ◽  
pp. 923-929 ◽  
Author(s):  
Hamed Kamrani ◽  
Dominic Jabs ◽  
Vincenzo d'Alessandro ◽  
Niccolo Rinaldi ◽  
Thomas Jacquet ◽  
...  
Keyword(s):  
Stress Conditions ◽  
Hot Carrier ◽  
Degradation Modeling ◽  
Hot Carrier Degradation
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