Force and collapsed shape of a liquid solder bump under load

2017 ◽  
Vol 79 ◽  
pp. 547-553
Author(s):  
N. van Veen ◽  
W. Luiten
Keyword(s):  
Solder Bump ◽  
Liquid Solder

The Use of Precision Selective Area Milling for Failure Analysis of Flip-Chip Packages

2002 ◽  
Author(s):  
George F. Gaut
Keyword(s):  
Failure Analysis ◽  
Flip Chip ◽  
Solder Bump ◽  
Selective Area ◽  
Fill Material ◽  
Solder Bumps ◽  
Time Required

Abstract Access to the solder bump and under-fill material of flip-chip devices has presented a new problem for failure analysts. The under-fill and solder bumps have also added a new source for failure causes. A new tool has become available that can reduce the time required to analyze this area of a flip-chip package. By using precision selective area milling it is possible to remove material (die or PCB) that will allow other tools to expose the source of the failure.

Quantitative Evaluation of Voids in Lead Free Solder Joints

2015 ◽  
Vol 772 ◽  
pp. 284-289 ◽  
Author(s):  
Sabuj Mallik ◽  
Jude Njoku ◽  
Gabriel Takyi
Keyword(s):  
Solder Bump ◽  
Solder Joints ◽  
Void Formation ◽  
Lead Free ◽  
Lead Free Solder ◽  
Solder Paste ◽  
X Ray ◽  
Size And Shape ◽  
Solder Bumps ◽  
Free Solder

Voiding in solder joints poses a serious reliability concern for electronic products. The aim of this research was to quantify the void formation in lead-free solder joints through X-ray inspections. Experiments were designed to investigate how void formation is affected by solder bump size and shape, differences in reflow time and temperature, and differences in solder paste formulation. Four different lead-free solder paste samples were used to produce solder bumps on a number of test boards, using surface mount reflow soldering process. Using an advanced X-ray inspection system void percentages were measured for three different size and shape solder bumps. Results indicate that the voiding in solder joint is strongly influenced by solder bump size and shape, with voids found to have increased when bump size decreased. A longer soaking period during reflow stage has negatively affectedsolder voids. Voiding was also accelerated with smaller solder particles in solder paste.

Defect Detection of Flip Chip Solder Bumps Through Local Temporal Coherence Analysis of Laser Ultrasound Signals

2007 ◽  
Author(s):  
Jin Yang ◽  
Charles Ume
Keyword(s):  
Defect Detection ◽  
Flip Chip ◽  
Solder Bump ◽  
Temporal Coherence ◽  
Coherence Analysis ◽  
Laser Ultrasound ◽  
Surface Mount ◽  
Flip Chips ◽  
Solder Bumps ◽  
Ultrasound Signals

Microelectronics packaging technology has evolved from through-hole and bulk configuration to surface-mount and small-profile ones. In surface mount packaging, such as flip chips, chip scale packages (CSP), and ball grid arrays (BGA), chips/packages are attached to the substrates or printed wiring boards (PWB) using solder bump interconnections. Solder bumps, which are hidden between the device and the substrate/board, are no longer visible for inspection. A novel solder bump inspection system has been developed using laser ultrasound and interferometric techniques. This system has been successfully applied to detect solder bump defects including missing, misaligned, open, and cracked solder bumps in flip chips, and chip scale packages. This system uses a pulsed Nd:YAG laser to induce ultrasound in the thermoelastic regime and the transient out-of-plane displacement response on the device surface is measured using the interferometric technique. In this paper, local temporal coherence (LTC) analysis of laser ultrasound signals is presented and compared to previous signal processing methods, including Error Ratio and Correlation Coefficient. The results show that local temporal coherence analysis increases measurement sensitivity for inspecting solder bumps in packaged electronic devices. Laser ultrasound inspection results are also compared with X-ray and C-mode Scanning Acoustic Microscopy (CSAM) results. In particular, this paper discusses defect detection for a 6.35mm×6.35mm×0.6mm PB18 flip chip and a flip chip (SiMAF) with 24 lead-free solder bumps. These two flip chip specimens are both non-underfilled.

WETTING BEHAVIOR IN ULTRASONIC VIBRATION-ASSISTED BRAZING OF ALUMINUM TO GRAPHITE USING Sn-Ag-Ti ACTIVE SOLDER

2015 ◽  
Vol 22 (03) ◽  
pp. 1550035 ◽  
Author(s):  
WEI-YUAN YU ◽  
SEN-HUI LIU ◽  
XIN-YA LIU ◽  
JIA-LIN SHAO ◽  
MIN-PEN LIU
Keyword(s):  
Oxide Layer ◽  
Ultrasonic Vibration ◽  
Pure Aluminum ◽  
Decomposition Temperature ◽  
Ultrasonic Waves ◽  
Atmospheric Conditions ◽  
Liquid Solder ◽  
Ambient Conditions ◽  
Composite Oxides ◽  
Surface Oxides

In this study, Sn - Ag - Ti ternary alloy has been used as the active solder to braze pure aluminum and graphite in atmospheric conditions using ultrasonic vibration as an aid. The authors studied the formation, composition and decomposition temperature of the surface oxides of the active solder under atmospheric conditions. In addition, the wettability of Sn -5 Ag -8 Ti active solder on the surface of pure aluminum and graphite has also been studied. The results showed that the major components presented in the surface oxides formed on the Sn -5 Ag -8 Ti active solder under ambient conditions are TiO , TiO 2, Ti 2 O 3, Ti 3 O 5 and SnO 2. Apart from AgO and Ag 2 O 2, which can be decomposed at the brazing temperature (773 K), other oxides will not be decomposed. The oxide layer comprises composite oxides and it forms a compact layer with a certain thickness to enclose the melted solder, which will prevent the liquid solder from wetting the base metals at the brazing temperature. After ultrasonic vibration, the oxide layer was destroyed and the liquid solder was able to wet and spread out around the base materials. Furthermore, better wettability of the active solder was observed on the surface of graphite and pure aluminum at the brazing temperature of 773–823 K using ultrasonic waves. The ultrasonic wave acts as the dominant driving factor which promotes the wetting and spreading of the liquid solder on the surface of graphite and aluminum to achieve a stable and reliable brazed joint.

Direct Solder Bump Formation Technique on Al Pad and Its High Reliability

1992 ◽  
Vol 31 (Part 1, No. 3) ◽  
pp. 761-767 ◽  
Author(s):  
Toshinori Ogashiwa ◽  
Hideyuki Akimoto ◽  
Hiroyuki Shigyo ◽  
Yoshihiro Murakami ◽  
Akihisa Inoue ◽  
...  
Keyword(s):  
Solder Bump ◽  
High Reliability ◽  
Formation Technique

Area Array Solder Joints for Passive Alignment

1992 ◽  
Vol 264 ◽  
Author(s):  
John McGroarty ◽  
Boris Yost ◽  
Peter Børgesen ◽  
Che-Yu Li
Keyword(s):  
Optical Interconnects ◽  
Solder Joints ◽  
Cost Effective ◽  
Scientific Basis ◽  
Electronic Packages ◽  
Liquid Solder ◽  
Area Array ◽  
Cost Effective Method ◽  
Passive Alignment

AbstractPassive alignment techniques using area array solder joints are currently under investigation as a cost effective method of achieving electro-optical interconnects in electronic packages. Several investigators have developed models that describe the shapes of and forces produced by the liquid solder drops during reflow. These models are reviewed to provide a scientific basis for the application of such techniques.

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