Transient characteristic analysis of high temperature CMOS digital integrated circuits

1994 ◽  
Vol 11 (2) ◽  
pp. 104-115
Author(s):  
Ke Daoming ◽  
Feng Yaolan ◽  
Tong Qinyi ◽  
Ke Xiaoli
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Transient Characteristic ◽  
Digital Integrated Circuits ◽  
Characteristic Analysis

A 4H-SiC Bipolar Technology for High-Temperature Integrated Circuits

2013 ◽  
Vol 10 (4) ◽  
pp. 155-162 ◽  
Author(s):  
L. Lanni ◽  
B. G. Malm ◽  
C.-M. Zetterling ◽  
M. Östling
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Low Voltage ◽  
Supply Voltage ◽  
Bipolar Transistors ◽  
Digital Integrated Circuits ◽  
Successful Operation ◽  
Bipolar Technology ◽  
Propagation Delays ◽  
Interconnect Systems

A 4H-SiC bipolar technology suitable for high-temperature integrated circuits is tested with two interconnect systems based on aluminum and platinum. Successful operation of low-voltage bipolar transistors and digital integrated circuits based on emitter coupled logic (ECL) is reported from 27°C up to 500°C for both the metallization systems. When operated on −15 V supply voltage, aluminum and platinum interconnect OR-NOR gates showed stable noise margins of about 1 V and asymmetric propagation delays of about 200 and 700 ns in the whole temperature range for both OR and NOR output. The performance of aluminum and platinum interconnects was evaluated by performing accelerated electromigration tests at 300°C with current density of about 1 MA/cm2 on contact chains consisting of 10 integrated resistors. Although in both cases the contact chains failed after less than one hour, different failure mechanisms were observed for the two metallization systems: electromigration for the aluminum system and poor step coverage and via filling for the platinum system.

300C Capable Digital Integrated Circuits in SiC Technology

2012 ◽  
Vol 717-720 ◽  
pp. 1261-1264 ◽  
Author(s):  
Amita Patil ◽  
Naresh Rao ◽  
Vinayak Tilak
Keyword(s):  
Silicon Carbide ◽  
High Temperature ◽  
Elevated Temperature ◽  
Integrated Circuits ◽  
Room Temperature ◽  
Continuous Operation ◽  
Shift Register ◽  
Digital Integrated Circuits ◽  
Enhancement Mode

This paper pertains to development of high temperature capable digital integrated circuits in n-channel, enhancement-mode Silicon Carbide (SiC) MOS technology. Among the circuits developed in this work are data latch, flip flops, 4-bit shift register and ripple counter. All circuits are functional from room temperature up to 300C without any notable degradation in performance at elevated temperature. The 4-bit counter demonstrated stable behavior for over 500 hours of continuous operation at 300C.

A 4H-SiC Bipolar Technology for High-temperature Integrated Circuits

2013 ◽  
Vol 2013 (HITEN) ◽  
pp. 000282-000289
Author(s):  
L. Lanni ◽  
B. G. Malm ◽  
C.-M. Zetterling ◽  
M. Östling
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Low Voltage ◽  
Supply Voltage ◽  
Digital Integrated Circuits ◽  
Successful Operation ◽  
Bipolar Technology ◽  
Propagation Delays ◽  
Interconnect Systems ◽  
Stable Noise

A 4H-SiC bipolar technology suitable for high-temperature integrated circuits is tested with two interconnect systems based on Aluminium and Platinum. Successful operation of low-voltage bipolar transistor and digital integrated circuits based on emitter coupled logic (ECL) is reported from 27 up to 500 °C for both the metallization systems. When operated on −15 V supply voltage, Aluminium and Platinum OR-NOR gates showed stable noise margins of about 1 V and asymmetric propagation delays of about 200 and 700 ns in the whole temperature range for both OR and NOR output. The performance of Aluminium and Platinum interconnect were evaluated by performing accelerated electromigration tests at 300 °C with current density of about 1 MA/cm2 on contact chains consisting of 10 integrated resistors.

An Alternative to High-Temperature and Acid/Solvent-Based Methods for Removing Integrated Circuits from Ceramic or Other Problem Substrates

2005 ◽  
Author(s):  
Carl M. Nail
Keyword(s):  
High Temperature ◽  
Integrated Circuits ◽  
Success Rate ◽  
Mechanical Damage ◽  
Test Equipment ◽  
High Success Rate ◽  
Automated Test Equipment ◽  
Removal Method ◽  
Automated Test ◽  
Conventional Methods

Abstract Dice must often be removed from their packages and reassembled into more suitable packages for them to be tested in automated test equipment (ATE). Removing bare dice from their substrates using conventional methods poses risks for chemical, thermal, and/or mechanical damage. A new removal method is offered using metallography-based and parallel polishing-based techniques to remove the substrate while exposing the die to minimized risk for damage. This method has been tested and found to have a high success rate once the techniques are learned.

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