High voltage GaN-based power HEMTs with field plate technique: Breakdown voltage and switching characteristics

2003 ◽  
Vol 0 (7) ◽  
pp. 2347-2350 ◽  
Author(s):  
Yoshiharu Takada ◽  
Wataru Saito ◽  
Masahiko Kuraguchi ◽  
Ichiro Omura ◽  
Kunio Tsuda
Keyword(s):  
Breakdown Voltage ◽  
High Voltage ◽  
Field Plate ◽  
Plate Technique ◽  
Switching Characteristics

scholarly journals The Investigation of Field Plate Design in 500 V High Voltage NLDMOS

2015 ◽  
Vol 2015 ◽  
pp. 1-6
Author(s):  
Donghua Liu ◽  
Xiangming Xu ◽  
Feng Jin ◽  
Wenting Duan ◽  
Huihui Wang ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
High Voltage ◽  
Field Plate ◽  
Plate Design ◽  
Drift Length ◽  
Drain Side ◽  
Resistance Performance

This paper presents a 500 V high voltage NLDMOS with breakdown voltage (VBD) improved by field plate technology. Effect of metal field plate (MFP) and polysilicon field plate (PFP) on breakdown voltage improvement of high voltage NLDMOS is studied. The coeffect of MFP and PFP on drain side has also been investigated. A 500 V NLDMOS is demonstrated with a 37 μm drift length and optimized MFP and PFP design. Finally the breakdown voltage 590 V and excellent on-resistance performance (Rsp= 7.88 ohm * mm2) are achieved.

Theoretical Study of an Effective Field Plate Termination for SiC Devices Based on High-k Dielectrics

2006 ◽  
Vol 527-529 ◽  
pp. 1087-1090 ◽  
Author(s):  
M. Brezeanu ◽  
M. Badila ◽  
Gheorghe Brezeanu ◽  
F. Udrea ◽  
C. Boianceanu ◽  
...  
Keyword(s):  
Dielectric Permittivity ◽  
Breakdown Voltage ◽  
Theoretical Study ◽  
Effective Field ◽  
Field Plate ◽  
Plate Technique ◽  
High K

A classical implementation of the field plate technique is the oxide ramp termination. This paper presents improvements of the breakdown voltage for both SiC JBDs and SBDs, obtained by using high-k dielectrics. A study regarding the influence of the dielectric permittivity and thickness on the off-state performances of the diodes is included. It is shown that Si3N4 is to be preferred to SiO2 for the dielectric ramp. Termination efficiencies up to 96% are reported.

scholarly journals Step-Double-Zone-JTE for SiC Devices with Increased Tolerance to JTE Dose and Surface Charges

Micromachines ◽  
2018 ◽  
Vol 9 (12) ◽  
pp. 610 ◽  
Author(s):  
Yifei Huang ◽  
Ying Wang ◽  
Xiaofei Kuang ◽  
Wenju Wang ◽  
Jianxiang Tang ◽  
...  
Keyword(s):  
Electric Field ◽  
Numerical Simulations ◽  
Breakdown Voltage ◽  
Surface Charges ◽  
Field Plate ◽  
Edge Termination ◽  
Plate Technique

In this paper, an edge termination structure, referred to as step-double-zone junction termination extension (Step-DZ-JTE), is proposed. Step-DZ-JTE further improves the distribution of the electric field (EF) by its own step shape. Step-DZ-JTE and other termination structures are investigated for comparison using numerical simulations. Step-DZ-JTE greatly reduces the sensitivity of breakdown voltage (BV) and surface charges (SC). For a 30-μm thick epi-layer, the optimized Step-DZ-JTE shows 90% of the theoretical BV with a wide tolerance of 12.2 × 1012 cm−2 to the JTE dose and 85% of the theoretical BV with an improved tolerance of 3.7 × 1012 cm−2 to the positive SC are obtained. Furthermore, when combined with the field plate technique, the performance of the Step-DZ-JTE is further improved.

The Mechanism of Field-Plate Induced the Breakdown Voltage Change of High Voltage LDMOS

2021 ◽  
Author(s):  
Ching-Kuei Shih ◽  
Chih-Cherng Liao ◽  
Karuna Nidhi ◽  
Kai-Chuan Kan ◽  
Ke-Horng Chen ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
High Voltage ◽  
Field Plate ◽  
Voltage Change

On the Breakdown Voltage Temperature Dependence of High-Voltage Power Diode Passivated with Diamond-Like Carbon

2021 ◽  
Author(s):  
Luigi Balestra ◽  
Susanna Reggiani ◽  
Antonio Gnudi ◽  
Elena Gnani ◽  
Jagoda Dobrzynska ◽  
...  
Keyword(s):  
Temperature Dependence ◽  
Breakdown Voltage ◽  
High Voltage ◽  
Diamond Like Carbon ◽  
Power Diode

scholarly journals Design of a Low on Resistance High Voltage (120V) Novel 3D NLDMOS with Side Isolation Based on 0.35um BCD Process Technology

2018 ◽  
Vol 201 ◽  
pp. 02004
Author(s):  
Shao-Ming Yang ◽  
Gene Sheu ◽  
Tzu Chieh Lee ◽  
Ting Yao Chien ◽  
Chieh Chih Wu ◽  
...  
Keyword(s):  
Breakdown Voltage ◽  
High Voltage ◽  
High Performance ◽  
Power Device ◽  
Simulation Tool ◽  
Process Technology ◽  
Surface Field ◽  
Kirk Effect ◽  
Tcad Simulation ◽  
Reduced Surface

High performance power device is necessary for BCD power device. In this paper, we used 3D Synopsis TCAD simulation tool Sentaurus to develop 120V device and successfully simulated. We implemented in a conventional 0.35um BCDMOS process to present of a novel high side 120V LDMOS have reduced surface field (RESURF) and Liner p-top structure with side isolation technology. The device has been research to achieve a benchmark specific on-resistance of 189 mΩ-mm2 while maintaining horizontal breakdown voltage and vertical isolation voltage both to target breakdown voltage of 120V. In ESOA, we also proposed a better performance of both device without kirk effect.

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