Low- and high-frequencyC-V characteristics of the contacts formed by sublimation of the nonpolymeric organic compound on p-type Si substrate

2004 ◽  
Vol 201 (14) ◽  
pp. 3077-3086 ◽  
Author(s):  
C. Temirci ◽  
M. �akar ◽  
A. T�r�t ◽  
Y. Onganer
Keyword(s):  
Organic Compound ◽  
Si Substrate ◽  
P Type

scholarly journals Low cost, p-ZnO/n-Si, rectifying, nano heterojunction diode: Fabrication and electrical characterization

2014 ◽  
Vol 5 ◽  
pp. 2216-2221 ◽  
Author(s):  
Vinay Kabra ◽  
Lubna Aamir ◽  
M M Malik
Keyword(s):  
Zno Nanoparticles ◽  
Low Cost ◽  
Electrical Characterization ◽  
Hall Effect Measurement ◽  
Dip Coating ◽  
Si Substrate ◽  
Electronic Circuitry ◽  
Uv Illumination ◽  
P Type ◽  
Dip Coating Technique

A low cost, highly rectifying, nano heterojunction (p-ZnO/n-Si) diode was fabricated using solution-processed, p-type, ZnO nanoparticles and an n-type Si substrate. p-type ZnO nanoparticles were synthesized using a chemical synthesis route and characterized by XRD and a Hall effect measurement system. The device was fabricated by forming thin film of synthesized p-ZnO nanoparticles on an n-Si substrate using a dip coating technique. The device was then characterized by current–voltage (I–V) and capacitance–voltage (C–V) measurements. The effect of UV illumination on the I–V characteristics was also explored and indicated the formation of a highly rectifying, nano heterojunction with a rectification ratio of 101 at 3 V, which increased nearly 2.5 times (232 at 3 V) under UV illumination. However, the cut-in voltage decreases from 1.5 V to 0.9 V under UV illumination. The fabricated device could be used in switches, rectifiers, clipper and clamper circuits, BJTs, MOSFETs and other electronic circuitry.

Effect of Layer Relaxation on the Internal Photoemission in Pt/Si1−xGex Schottky Barrier Type Infrared Detectors

1999 ◽  
Vol 607 ◽  
Author(s):  
B. Aslan ◽  
R. Turan ◽  
O. Nur ◽  
M. Karlsteen ◽  
M. Willander
Keyword(s):  
Barrier Height ◽  
Strain Relaxation ◽  
Infrared Detector ◽  
Band Edge ◽  
Schottky Junction ◽  
Si Substrate ◽  
Strained Si ◽  
Internal Photoemission ◽  
Schottky Type ◽  
P Type

AbstractA Schottky type infrared detector fabricated on a p-type Si1−xGex substrate has a higher cut-off wavelength than one on a pure Si substrate because the barrier height of the Schottky junction on p-type Si1−xGex decreases with the Ge content and the induced strain in the Si1−xGex layer. We have studied the effect of the strain relaxation on the internal photoemission and I-V characteristics of a Pt/Si1−xGex Schottky junction with x=0.14. It is shown that the cut-off wavelength of the diode made on a strained Si0.86Ge0.14 layer is higher than that on a Si substrate as expected. This shows the possibility of tuning the range of these detectors in the mid-infrared region. However, the thermal relaxation in the Si0.86Ge0.14 layer is found to reduce the cut-off wavelength to lower values, showing that the difference between the Fermi level of the metal and the valence band edge increases with the layer relaxation. This effect should be taken into account when a Schottky type infrared detector is manufactured on a strained Si1−xGex film. I-V characteristics of the junctions also indicate an increase of the barrier height with the relaxation of Si1−xGex. These results demonstrate the band edge movements in a Si ixGex layer experimentally agree with the expected changes in the band structure of the Si1−xGex layer with strain relaxation.

Arsenic Diffusion and Segregation Behavior at the Interface of Epitaxial CoSi2 Film and Si Substrate

1993 ◽  
Vol 320 ◽  
Author(s):  
S. L. Hsia ◽  
T. Y. Tan ◽  
P. L. Smith ◽  
G. E. Mcguire
Keyword(s):  
Qualitative Agreement ◽  
Film Formation ◽  
Formation Temperature ◽  
Si Substrate ◽  
Free Surfaces ◽  
Si Substrates ◽  
Segregation Behavior ◽  
P Type ◽  
Physical Reasons ◽  
Source Materials

ABSTRACTArsenic diffusion and segregation properties at the interface of the epitaxial CoSi2 and Si substrate have been studied. Samples have been prepared using Co-Ti bimetallic source materials and two types of (001) Si substrates: n+ (doped by As to ∼2}1019 cm−3) and p. For the n+ Si cases, the lower limit of the CoSi2 film formation temperature is increased by ∼200°C to ∼700°C. SIMS results showed As segregation into Si. For epitaxial CoSi2 film formation at 900°C, the As concentration has increased by a factor of ∼2 within a distance of ∼30nm from the interface, while the incorporated As in the film is ∼30-50 times less than that in Si. For p-type Si substrate cases, the epitaxial CoSi2 film was first grown and followed by As+ implantation (into the film) and drive-in processes. It is observed that As was segregated to the CoSi2-Si interface and diffused into Si. This is in qualitative agreement with our results obtained from the n+ substrate experiments and the results of other authors involving the use of polycrystalline CoSi2 films. In the present cases, all implanted As were conserved at a drive in-temperature of 1000°C for up to 100 s. This is in contrast to the polycrystalline CoSi2 film results which involve a substantial As loss to the film free surfaces. The physical reasons of this difference have been discussed.

Charge and Current Transient Measurements on N-Type Hydrogenated Amorphous Silicon in the Relaxation Regime

1994 ◽  
Vol 336 ◽  
Author(s):  
Uwe W. Paschen ◽  
Daewon Kwon ◽  
J. David Cohen
Keyword(s):  
Thermal Emission ◽  
Depletion Region ◽  
Current Transient ◽  
Relaxation Model ◽  
Si Substrate ◽  
Capacitance Measurements ◽  
Transient Data ◽  
P Type ◽  
Hydrogenated Amorphous ◽  
Transient Measurements

ABSTRACTJunction capacitance measurements were employed to study the thermal emission of electrons after application of a voltage filling pulse on a 80 Vppm PH3 doped a-Si:H sample on p+ c-Si substrate. We show that these data can be explained in terms of the relaxation Model. In addition, the time dependence of the charge flow into the depletion region during the filling pulse is investigated by current transient Measurements. Finally, we present charge transient data for a 9 Vppm a-Si:H sample on n+ c-Si substrate and compare the results to those obtained on samples on p-type substrates.

GaAs/AlGaAs Diode Lasers on Monolithic GaAs/Si Substrates

1986 ◽  
Vol 67 ◽  
Author(s):  
T. H. Windhorn ◽  
G. W. Turner ◽  
G. M. Metze
Keyword(s):  
Active Region ◽  
Diode Lasers ◽  
Si Substrate ◽  
Mole Percent ◽  
Double Heterostructure ◽  
Graded Index ◽  
Si Substrates ◽  
Stripe Width ◽  
Power Outputs ◽  
P Type

ABSTRACTOne approach to the development of optical interconnects between Si systems utilizes diode lasers fabricated in III-V epitaxial layers grown on Si wafers. We have fabricated double-heterostructure lasers in GaAs/AlGaAs layers grown on a Ge-coated Si substrate, and both asymmetric largeoptical- cavity (LOC) lasers and graded-index, separate-confinement heterostructure (GRIN-SCH) lasers in such layers grown directly on a Si substrate. The GaAs/AlGaAs layers were grown by molecular beam epitaxy on (100) p-Si substrates. Si and Be were used as the n- and p-type dopants, respectively. Oxide-defined stripe-geometry devices, 300 μm long, were fabricated using standard AuSn and CrAu metallizations for the n- and ptype contacts, respectively. The laser facets were formed by ion-beamassisted etching. The double-heterostructure devices (8 μm stripe width), in which the active region contained about 10 mole percent AlAs, were evaluated using pulsed bias at 77 K. They produced power outputs up to 3.3 mW per facet and exhibited thresholds as low as 170 mA. The LOC devices (4 μm stripe width), which had a GaAs active region, were characterized using pulsed bias at 300 K. These devices produced power outputs up to 27 mW per facet. The lowest threshold was 775 mA. The GRIN-SCH devices (4 μm stripe width), which incorporated a 70 Å GaAs quantum well active layer, were also characterized using pulsed bias at 300 K. These devices were not operated at power outputs above −5 mW. Their lowest threshold was 220 mA.

Impact of the Gate Material on the Deep Levels in a-Si:H/c-Si Metal-Insulator-Semiconductor Capacitors

2015 ◽  
Vol 242 ◽  
pp. 61-66
Author(s):  
Eddy Simoen ◽  
Valentina Ferro ◽  
Barry O’Sullivan
Keyword(s):  
Minority Carrier ◽  
Crystalline Silicon ◽  
Deep Level ◽  
Silicon Layer ◽  
Si Substrate ◽  
Metal Insulator ◽  
Metal Insulator Semiconductor ◽  
Transient Spectroscopy ◽  
P Type ◽  
Mis Capacitors

Deep Level Transient Spectroscopy (DLTS) has been applied to Metal-Insulator-Semiconductor (MIS) capacitors, consisting of a p+ or n+ a-Si:H gate on an intrinsic i-a-Si:H passivation layer deposited on crystalline silicon n-or p-type substrates. It is shown that the type of gate has a pronounced impact on the obtained spectra, whereby both the kind of defects (dangling bonds at the a-Si:H/(100) c-Si interface (Pb0 defects) or in the amorphous silicon layer (D defects) and their relative importance (peak amplitude) may be varied. The highest trap densities have been found for the p+ a-Si:H gate capacitors on an n-type Si substrate. In addition, the spectra may exhibit unexpected negative peaks, suggesting minority carrier capture. These features are tentatively associated with interface states at the p+ or n+ a-Si:H/i-a-Si:H interface. Their absence in Al-gate capacitors is in support of this hypothesis.

Van der Waals heterojunction diode composed of WS2flake placed on p-type Si substrate

2017 ◽  
Vol 29 (4) ◽  
pp. 045201 ◽  
Author(s):  
Sikandar Aftab ◽  
M Farooq Khan ◽  
Kyung-Ah Min ◽  
Ghazanfar Nazir ◽  
Amir Muhammad Afzal ◽  
...  
Keyword(s):  
Van Der Waals ◽  
Heterojunction Diode ◽  
Si Substrate ◽  
P Type

FABRICATION AND PROPERTIES OF La0.8Ca0.2MnO3 FIELD EFFECT TRANSISTORS

2007 ◽  
Vol 14 (04) ◽  
pp. 745-749
Author(s):  
WANG LI FENG ◽  
ZHANG WEI WEI ◽  
ZHOU YU QING ◽  
ZHU MING
Keyword(s):  
Field Effect ◽  
Colossal Magnetoresistance ◽  
Field Effect Transistors ◽  
Sudden Increase ◽  
Gate Bias ◽  
Si Substrate ◽  
First Order ◽  
Type Semiconductor ◽  
Different Temperatures ◽  
P Type

The inverted-gate colossal magnetoresistance-field-effect-transistors (CMR-FETs) were designed and successfully fabricated on the Si substrate by using semiconductor techniques. The studies on the capacitance properties were carried out under different temperatures, different frequencies, and different gate biases. The results indicate that La 0.8 Ca 0.2 MnO 3 is the typical p-type semiconductor. It was shown that the capacitance increases with the increasing of the temperature under certain gate bias. The sudden increase of the capacitance at 160 K was observed and needeed to be studied further. Meanwhile the capacitance decreased as the frequency increased with first order exponential decay fitting.

Analog and bipolar resistive switching in pn junction of n-type ZnO nanowires on p-type Si substrate

2013 ◽  
Vol 114 (6) ◽  
pp. 064502 ◽  
Author(s):  
Seung Chang Lee ◽  
Quanli Hu ◽  
Yoon-Jae Baek ◽  
Young Jin Choi ◽  
Chi Jung Kang ◽  
...  
Keyword(s):  
Resistive Switching ◽  
Zno Nanowires ◽  
Si Substrate ◽  
Bipolar Resistive Switching ◽  
Pn Junction ◽  
P Type
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