2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip
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9781479918706

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2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.5 ◽

2015 ◽

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Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.10 ◽

2015 ◽

Author(s):

Luca Ramini ◽

Mahdi Tala ◽

Davide Bertozzi

Keyword(s):

Embedded Systems ◽

Power Efficiency ◽

Contention Resolution ◽

Avoidance Strategies ◽

Optical Ring

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2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.7 ◽

2015 ◽

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A Parallel Gauss-Seidel Algorithm on a 3D Torus Network-on-Chip Architecture

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.8 ◽

2015 ◽

Author(s):

Khaled Day ◽

Mohammad H. Al-Towaiq

Keyword(s):

Network On Chip ◽

On Chip ◽

Torus Network

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Title Page i

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.1 ◽

2015 ◽

Keyword(s):

Title Page

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Title Page iii

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.2 ◽

2015 ◽

Keyword(s):

Title Page

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Introduction

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.4 ◽

2015 ◽

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Author Index

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.13 ◽

2015 ◽

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Towards High-Performance and Power-Efficient Optical NoCs Using Silicon-in-Silica Photonic Components

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.12 ◽

2015 ◽

Author(s):

Elena Kakoulli ◽

Vassos Soteriou ◽

Charalambos Koutsides ◽

Kyriacos Kalli

Keyword(s):

High Performance ◽

Power Efficient ◽

Photonic Components

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Cover Art

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip ◽

10.1109/ina-ocmc.2015.15 ◽

2015 ◽

Keyword(s):

Cover Art

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2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip
Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Workshop Organizers

Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems

Table of Contents

A Parallel Gauss-Seidel Algorithm on a 3D Torus Network-on-Chip Architecture

Title Page i

Title Page iii

Introduction

Author Index

Towards High-Performance and Power-Efficient Optical NoCs Using Silicon-in-Silica Photonic Components

Cover Art

Export Citation Format

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-ChipLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Workshop Organizers

Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems

Table of Contents

A Parallel Gauss-Seidel Algorithm on a 3D Torus Network-on-Chip Architecture

Title Page i

Title Page iii

Introduction

Author Index

Towards High-Performance and Power-Efficient Optical NoCs Using Silicon-in-Silica Photonic Components

Cover Art

2015 Ninth International Workshop on Interconnection Network Architectures: On-Chip, Multi-Chip
Latest Publications