Contrasting Power Efficiency of Contention Resolution vs. Avoidance Strategies in Optical Ring Interconnects for Photonically-Integrated Embedded Systems

2015 ◽  
Author(s):  
Luca Ramini ◽  
Mahdi Tala ◽  
Davide Bertozzi
Keyword(s):  
Embedded Systems ◽  
Power Efficiency ◽  
Contention Resolution ◽  
Avoidance Strategies ◽  
Optical Ring

Linked instruction caches for enhancing power efficiency of embedded systems

2014 ◽  
Vol 38 (3) ◽  
pp. 197-207 ◽  
Author(s):  
Chang-Jung Ku ◽  
Ching-Wen Chen ◽  
An Hsia ◽  
Chun-Lin Chen
Keyword(s):  
Embedded Systems ◽  
Power Efficiency ◽  
Instruction Caches

scholarly journals FPGA-Based Inter-layer Pipelined Accelerators for Filter-Wise Weight-Balanced Sparse Fully Convolutional Networks with Overlapped Tiling

2021 ◽  
Author(s):  
Masayuki Shimoda ◽  
Youki Sada ◽  
Hiroki Nakahara
Keyword(s):  
Embedded Systems ◽  
Power Efficiency ◽  
High Speed ◽  
Random Access ◽  
Semantic Segmentation ◽  
Input Image ◽  
Fpga Implementation ◽  
Image Size ◽  
Real Time Processing ◽  
Fully Convolutional Networks

AbstractConvolutional neural networks (CNNs) exhibit state-of-the-art performance while performing computer-vision tasks. CNNs require high-speed, low-power, and high-accuracy hardware for various scenarios, such as edge environments. However, the number of weights is so large that embedded systems cannot store them owing to their limited on-chip memory. A different method is used to minimize the input image size, for real-time processing, but it causes a considerable drop in accuracy. Although pruned sparse CNNs and special accelerators are proposed, the requirement of random access incurs a large number of wide multiplexers for a high degree of parallelism, which becomes more complicated and unsuitable for FPGA implementation. To address this problem, we propose filter-wise pruning with distillation and block RAM (BRAM)-based zero-weight skipping accelerator. It eliminates weights such that each filter has the same number of nonzero weights, performing retraining with distillation, while retaining comparable accuracy. Further, filter-wise pruning enables our accelerator to exploit inter-filter parallelism, where a processing block for a layer executes filters concurrently, with a straightforward architecture. We also propose an overlapped tiling algorithm, where tiles are extracted with overlap to prevent both accuracy degradation and high utilization of BRAMs storing high-resolution images. Our evaluation using semantic-segmentation tasks showed a 1.8 times speedup and 18.0 times increase in power efficiency of our FPGA design compared with a desktop GPU. Additionally, compared with the conventional FPGA implementation, the speedup and accuracy improvement were 1.09 times and 6.6 points, respectively. Therefore, our approach is useful for FPGA implementation and exhibits considerable accuracy for applications in embedded systems.

scholarly journals Dynamic Frequency Scaling Regarding Memory for Energy Efficiency of Embedded Systems

2018 ◽  
Vol 8 (3) ◽  
pp. 1798
Author(s):  
Junha Kim ◽  
Moonju Park
Keyword(s):  
Energy Efficiency ◽  
Embedded Systems ◽  
Power Consumption ◽  
Power Management ◽  
Power Efficiency ◽  
Memory Access ◽  
Management Policy ◽  
Dynamic Scaling ◽  
Frequency Scaling ◽  
Frequency Selection

Memory significantly affects the power consumption of embedded systems as well as performance. CPU frequency scaling for power management could fail in optimizing the energy efficiency without considering the memory access. In this paper, we analyze the power consumption and energy efficiency of an embedded system that supports dynamic scaling of frequency for both CPU and memory access. The power consumption of the CPU and the memory is modeled to show that the memory access rate affects the energy efficiency and the CPU frequency selection. Based on the power model, a method for frequency selection is presented to optimize the power efficiency which is measured using Energy-Delay Product (EDP). The proposed method is implemented and tested on a commercial smartphone to achieve about 3.3% - 7.6% enhancement comparing with the power management policy provided by the manufacturer in terms of EDP.

I Want to Be Like You

2012 ◽  
Vol 43 (3) ◽  
pp. 115-126 ◽  
Author(s):  
Christina Matschke ◽  
Kai Sassenberg
Keyword(s):  
Social Identity ◽  
Identity Development ◽  
Self Regulation ◽  
Active Role ◽  
Social Identification ◽  
Social Self ◽  
Approach And Avoidance ◽  
Internal Motivation ◽  
Avoidance Strategies ◽  
Social Identity Development

Entering a new group provides the potential of forming a new social identity. Starting from self-regulation models, we propose that goals (e.g., internal motivation to enter the group), strategies (e.g., approach and avoidance strategies), and events (e.g., the group’s response) affect the development of the social self. In two studies we manipulated the group’s response (acceptance vs. rejection) and assessed internal motivation as well as approach and avoidance strategies. It was expected, and we found, that when newcomers are accepted, their use of approach strategies (but not avoidance strategies) facilitates social identification. In line with self-completion theory, for highly internally motivated individuals approach strategies facilitated social identification even upon rejection. The results underline the active role of newcomers in their social identity development.

Development of embedded systems to control toxic compounds in textile industries

2012 ◽  
Vol 1 (5) ◽  
pp. 115-117
Author(s):  
Jahnavi KRM Jahnavi KRM ◽  
◽  
Raghavendra Rao K ◽  
Padma Suvarna R
Keyword(s):  
Embedded Systems ◽  
Toxic Compounds ◽  
Textile Industries

Proposal and Evaluation of Mutual Exclusion Method using Lock-free Algorism for Embedded Systems using Multi-core Processor

2019 ◽  
Vol 139 (7) ◽  
pp. 802-811
Author(s):  
Kenta Fujimoto ◽  
Shingo Oidate ◽  
Yuhei Yabuta ◽  
Atsuyuki Takahashi ◽  
Takuya Yamasaki ◽  
...  
Keyword(s):  
Embedded Systems ◽  
Mutual Exclusion ◽  
Exclusion Method ◽  
Multi Core Processor

Towards Okinawa-style Robot-embedded Systems

2013 ◽  
Vol 133 (2) ◽  
pp. 111-115 ◽  
Author(s):  
Takashi Anezaki ◽  
Suriyon Tansuriyavong ◽  
Chikatoshi Yamada
Keyword(s):  
Embedded Systems

Effect of Shielding a Floating Electrode on the Power Efficiency of a Micro-plasma VUV Light Source

2015 ◽  
Vol 135 (3) ◽  
pp. 114-115 ◽  
Author(s):  
Ryoto Sato ◽  
Daisuke Yasumatsu ◽  
Shinya Kumagai ◽  
Masaru Hori ◽  
Minoru Sasaki
Keyword(s):  
Light Source ◽  
Power Efficiency ◽  
Floating Electrode
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