2011 IEEE Custom Integrated Circuits Conference (CICC)
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9781457702228
Latest Documents Most Cited Documents Contributed Authors Related Sources Related Keywords

A 1.0V 45nm nonvolatile magnetic latch design and its robustness analysis

2011 ◽  
Author(s):  
Peiyuan Wang ◽  
Xiang Chen ◽  
Yiran Chen ◽  
Hai Li ◽  
Seung Kang ◽  
...  
Keyword(s):  
Robustness Analysis

A 2GHz Digital PLL, with temperature lock range of −40°C to 125°C, in 45nm CMOS

2011 ◽  
Author(s):  
Biman Chattopadhyay ◽  
Anant S Kamath ◽  
Satyasai Evani ◽  
Karthik Subburaj

A 45nm CMOS neuromorphic chip with a scalable architecture for learning in networks of spiking neurons

2011 ◽  
Author(s):  
Jae-sun Seo ◽  
Bernard Brezzo ◽  
Yong Liu ◽  
Benjamin D. Parker ◽  
Steven K. Esser ◽  
...  
Keyword(s):  
Spiking Neurons ◽  
Scalable Architecture

A 16MHz BW 75dB DR CT ΔΣ ADC compensated for more than one cycle excess loop delay

2011 ◽  
Author(s):  
Vikas Singh ◽  
Nagendra Krishnapura ◽  
Shanthi Pavan ◽  
Baradwaj Vigraham ◽  
Nimit Nigania ◽  
...  
Keyword(s):  
Loop Delay ◽  
Excess Loop Delay
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