[1989] Proceedings International Conference on Wafer Scale Integration
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Published By IEEE Comput. Soc. Press

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A high-level WSI yield simulation system

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47554 ◽

2003 ◽

Cited By ~ 8

Author(s):

J.C. Harden ◽

J.J. Wang ◽

B.W. Tebbs

Keyword(s):

Simulation System ◽

High Level

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Future military avionics applications of wafer-scale technology

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47530 ◽

2003 ◽

Cited By ~ 4

Author(s):

R. Morgan ◽

M. Soraya

Keyword(s):

Wafer Scale

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A scaleable waferscale architecture for real-time 3-D image generation

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47540 ◽

2003 ◽

Cited By ~ 1

Author(s):

R.J. Westmore

Keyword(s):

Real Time ◽

Image Generation

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Redundancy for yield enhancement in the 3-D computer

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47538 ◽

2003 ◽

Cited By ~ 7

Author(s):

M.W. Yung ◽

M.J. Little ◽

R.D. Etchells ◽

J.G. Nash

Keyword(s):

Yield Enhancement

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An efficient design of embedded memories and their testability analysis using Markov chains

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47569 ◽

2003 ◽

Cited By ~ 3

Author(s):

P. Mazumder

Keyword(s):

Markov Chains ◽

Efficient Design ◽

Testability Analysis ◽

Embedded Memories

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A 3D HDI ASP: a cost-effective alternative to WSI signal processors

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47557 ◽

2003 ◽

Cited By ~ 2

Author(s):

K.D. Warren ◽

J.H. Reche ◽

W.J. Jacobi ◽

R.M. Lea

Keyword(s):

Cost Effective ◽

Effective Alternative ◽

Cost Effective Alternative ◽

Signal Processors

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Simulation and test of faults in WSI interconnect systems

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47565 ◽

2003 ◽

Cited By ~ 4

Author(s):

M. Gruetzner ◽

H. Grabinski

Keyword(s):

Interconnect Systems

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Yield analysis for fault-tolerant arrays

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47556 ◽

2003 ◽

Cited By ~ 5

Author(s):

D.M.H. Walker

Keyword(s):

Fault Tolerant ◽

Yield Analysis

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The 3-D computer

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47536 ◽

2003 ◽

Cited By ~ 24

Author(s):

M.J. Little ◽

R.D. Etchells ◽

J. Grinberg ◽

S.P. Laub ◽

J.G. Nash ◽

...

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Architectural yield analysis of random defects in wafer scale integration

[1989] Proceedings International Conference on Wafer Scale Integration ◽

10.1109/wafer.1989.47552 ◽

2003 ◽

Cited By ~ 7

Author(s):

J. Czechowski ◽

E.H. Rogers ◽

M.-J. Chung

Keyword(s):

Yield Analysis ◽

Wafer Scale ◽

Wafer Scale Integration ◽

Scale Integration ◽

Random Defects

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[1989] Proceedings International Conference on Wafer Scale IntegrationLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE Comput. Soc. Press

A high-level WSI yield simulation system

Future military avionics applications of wafer-scale technology

A scaleable waferscale architecture for real-time 3-D image generation

Redundancy for yield enhancement in the 3-D computer

An efficient design of embedded memories and their testability analysis using Markov chains

A 3D HDI ASP: a cost-effective alternative to WSI signal processors

Simulation and test of faults in WSI interconnect systems

Yield analysis for fault-tolerant arrays

The 3-D computer

Architectural yield analysis of random defects in wafer scale integration

[1989] Proceedings International Conference on Wafer Scale Integration
Latest Publications