Second IEEE International Workshop on Electronic Design, Test and Applications
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0769520812

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Dynamic Channel Order Estimation Algorithm

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10053 ◽

2005 ◽

Cited By ~ 3

Author(s):

P.J. Green ◽

D.P. Taylor

Keyword(s):

Estimation Algorithm ◽

Order Estimation ◽

Dynamic Channel

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Towards Analog and Mixed-Signal SOC Design with SystemC-AMS

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10008 ◽

2005 ◽

Cited By ~ 22

Author(s):

A. Vachoux ◽

C. Grimm ◽

K. Einwich

Keyword(s):

Mixed Signal

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Measurement and Analysis of Physical Defects for Dynamic Supply Current Testing

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10031 ◽

2005 ◽

Cited By ~ 3

Author(s):

S. Thomas ◽

R. Makki ◽

Sai Kishore Vavilala

Keyword(s):

Current Testing ◽

Measurement And Analysis ◽

Supply Current ◽

Physical Defects

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On Using Test Vector Differences for Reducing Test Pin Numbers

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10018 ◽

2005 ◽

Cited By ~ 1

Author(s):

M.-L. Flottes ◽

R. Poirier ◽

B. Rouzeyre

Keyword(s):

Test Vector

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An Overview of the Open Architecture Test System

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10026 ◽

2005 ◽

Cited By ~ 4

Author(s):

R. Rajsuman

Keyword(s):

Test System ◽

Open Architecture

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BioMedical Intelligence Security Home Network- ATM/IP CATV Network

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10046 ◽

2005 ◽

Author(s):

R. Volner ◽

L. Pousek

Keyword(s):

Home Network

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Enhancing Delay Fault Testability for FIR Filters Based on Realistic Sequential Cell Fault Model

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10080 ◽

2005 ◽

Author(s):

Shyue-Kung Lu ◽

Mau-Jung Lu

Keyword(s):

Fault Model ◽

Fir Filters ◽

Delay Fault

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The Fastest Carry Lookahead Adder

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10071 ◽

2005 ◽

Cited By ~ 4

Author(s):

Yu-Ting Pai ◽

Yu-Kumg Chen

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Artificial Controlled Neural Network Emulator for Quasi Resonant Converter

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10012 ◽

2005 ◽

Author(s):

U.S. Banu ◽

G. Uma ◽

M.A. Panneerselvam

Keyword(s):

Neural Network ◽

Resonant Converter ◽

Network Emulator

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Excitation Modes and Transient Response of a Winner-take-all Circuit

Second IEEE International Workshop on Electronic Design, Test and Applications ◽

10.1109/delta.2004.10074 ◽

2005 ◽

Author(s):

G. Kothapalli

Keyword(s):

Transient Response ◽

Winner Take All ◽

Take All

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Second IEEE International Workshop on Electronic Design, Test and ApplicationsLatest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Dynamic Channel Order Estimation Algorithm

Towards Analog and Mixed-Signal SOC Design with SystemC-AMS

Measurement and Analysis of Physical Defects for Dynamic Supply Current Testing

On Using Test Vector Differences for Reducing Test Pin Numbers

An Overview of the Open Architecture Test System

BioMedical Intelligence Security Home Network- ATM/IP CATV Network

Enhancing Delay Fault Testability for FIR Filters Based on Realistic Sequential Cell Fault Model

The Fastest Carry Lookahead Adder

Artificial Controlled Neural Network Emulator for Quasi Resonant Converter

Excitation Modes and Transient Response of a Winner-take-all Circuit

Second IEEE International Workshop on Electronic Design, Test and Applications
Latest Publications