Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001
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Synchronous handshake circuits

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914072 ◽

2002 ◽

Cited By ~ 11

Author(s):

A. Peeters ◽

K. Van Berkel

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Where are the async millionaires?

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914077 ◽

2002 ◽

Author(s):

K. Normoyle

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A practical comparison of asynchronous design styles

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914067 ◽

2002 ◽

Cited By ~ 5

Author(s):

D.W. Lloyd ◽

J.D. Garside

Keyword(s):

Asynchronous Design

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Exploiting typical DSP data access patterns and asynchrony for a low power multiported register bank

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914064 ◽

2002 ◽

Cited By ~ 1

Author(s):

M. Lewis ◽

L. Brackenbury

Keyword(s):

Low Power ◽

Data Access ◽

Data Access Patterns ◽

Access Patterns

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Designing fast asynchronous circuits

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914082 ◽

2002 ◽

Cited By ~ 14

Author(s):

I.E. Sutherland ◽

J.K. Lexau

Keyword(s):

Asynchronous Circuits

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Delay insensitive system-on-chip interconnect using 1-of-4 data encoding

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914075 ◽

2002 ◽

Cited By ~ 55

Author(s):

W.J. Bainbridge ◽

S.B. Furber

Keyword(s):

System On Chip ◽

Data Encoding ◽

On Chip

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Designing an asynchronous bus interface

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914074 ◽

2002 ◽

Cited By ~ 3

Author(s):

J. Kessels ◽

A. Peeters ◽

T. Kramer ◽

M. Feuser ◽

K.L. Ully

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GasP: a minimal FIFO control

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914068 ◽

2002 ◽

Cited By ~ 137

Author(s):

I. Sutherland ◽

S. Fairbanks

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A low-power self-timed Viterbi decoder

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914065 ◽

2002 ◽

Cited By ~ 8

Author(s):

P.A. Riocreux ◽

L.E.M. Brackenbury ◽

M. Cumpstey ◽

S.B. Furber

Keyword(s):

Low Power ◽

Viterbi Decoder

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PCA-1: a fully asynchronous, self-reconfigurable LSI

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001 ◽

10.1109/async.2001.914069 ◽

2002 ◽

Cited By ~ 22

Author(s):

R. Konishi ◽

H. Ito ◽

H. Nakada ◽

A. Nagoya ◽

K. Oguri ◽

...

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Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001Latest Publications

TOTAL DOCUMENTS

H-INDEX

Published By IEEE

Synchronous handshake circuits

Where are the async millionaires?

A practical comparison of asynchronous design styles

Exploiting typical DSP data access patterns and asynchrony for a low power multiported register bank

Designing fast asynchronous circuits

Delay insensitive system-on-chip interconnect using 1-of-4 data encoding

Designing an asynchronous bus interface

GasP: a minimal FIFO control

A low-power self-timed Viterbi decoder

PCA-1: a fully asynchronous, self-reconfigurable LSI

Proceedings Seventh International Symposium on Asynchronous Circuits and Systems. ASYNC 2001
Latest Publications