scholarly journals A practical comparison of asynchronous design styles

2002 ◽  
Author(s):  
D.W. Lloyd ◽  
J.D. Garside
Keyword(s):  
Asynchronous Design

scholarly journals A new interfacing circuit for low power asynchronous design in sensor systems

2014 ◽  
Vol 19 (1) ◽  
pp. 61-67 ◽  
Author(s):  
Jeong Tak Ryu ◽  
Won Kee Hong ◽  
Byung Ho Kang ◽  
Kyung Ki Kim
Keyword(s):  
Low Power ◽  
Sensor Systems ◽  
Asynchronous Design

scholarly journals Design of Completion Detectors in Asynchronous Communication System

2020 ◽  
Vol 9 (3) ◽  
pp. 3329-3334
Keyword(s):  
Power Consumption ◽  
Low Power ◽  
Communication System ◽  
Implementation Process ◽  
Asynchronous Communication ◽  
Digital Design ◽  
Low Power Consumption ◽  
Asynchronous Design ◽  
Global Clock ◽  
On Chip

In digital design, there are two types of design, synchronous design and asynchronous design. In synchronous design, global clock is one of the main system that consume a lot of power. The power in synchronous design is consumed by clock even if there is no data processing take place. The asynchronous design that depends on data is clockless and as far as the power is concerned, asynchronous design does not consume much power compared with synchronous design and this really make asynchronus design the preffered choice for low power consumption. Besides having low power consumption, there are many advantages of aynchronous design compared with synchronous design. This paper proposed new dual rail completion detector (CD), 3-6 CD, 2-7 CD and 1-4 CD for on-chip communication that are used widely in an asynchronous communication system. The design of CD is based on the principle of sum adder. The circuit is designed by using Altera Quartus II CAD tools, synthesis and implementation process is executed to check the syntax error of the design. The design proved to be successful by using asynchronous on-chip communication in the simulation.

scholarly journals SERAD: Soft Error Resilient Asynchronous Design Using a Bundled Data Protocol

2020 ◽  
Vol 67 (5) ◽  
pp. 1667-1677 ◽  
Author(s):  
Sai Aparna Aketi ◽  
Smriti Gupta ◽  
Huimei Cheng ◽  
Joycee Mekie ◽  
Peter A. Beerel
Keyword(s):  
Soft Error ◽  
Asynchronous Design ◽  
Error Resilient

Asynchronous design for programmable digital signal processors

1991 ◽  
Vol 39 (4) ◽  
pp. 939-952 ◽  
Author(s):  
T.H.-Y. Meng ◽  
R.W. Brodersen ◽  
D.G. Messerschmitt
Keyword(s):  
Digital Signal ◽  
Digital Signal Processors ◽  
Asynchronous Design ◽  
Signal Processors
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